Lines Matching refs:MF
65 bool AArch64RegisterInfo::hasSVEArgsOrReturn(const MachineFunction *MF) { in hasSVEArgsOrReturn() argument
66 const Function &F = MF->getFunction(); in hasSVEArgsOrReturn()
74 AArch64RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { in getCalleeSavedRegs()
75 assert(MF && "Invalid MachineFunction pointer."); in getCalleeSavedRegs()
77 if (MF->getFunction().getCallingConv() == CallingConv::GHC) in getCalleeSavedRegs()
81 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) in getCalleeSavedRegs()
86 if (MF->getSubtarget<AArch64Subtarget>().isTargetDarwin()) in getCalleeSavedRegs()
87 return getDarwinCalleeSavedRegs(MF); in getCalleeSavedRegs()
89 if (MF->getFunction().getCallingConv() == CallingConv::CFGuard_Check) in getCalleeSavedRegs()
91 if (MF->getSubtarget<AArch64Subtarget>().isTargetWindows()) in getCalleeSavedRegs()
93 if (MF->getFunction().getCallingConv() == CallingConv::AArch64_VectorCall) in getCalleeSavedRegs()
95 if (MF->getFunction().getCallingConv() == CallingConv::AArch64_SVE_VectorCall) in getCalleeSavedRegs()
97 if (MF->getSubtarget<AArch64Subtarget>().getTargetLowering() in getCalleeSavedRegs()
99 MF->getFunction().getAttributes().hasAttrSomewhere( in getCalleeSavedRegs()
102 if (MF->getFunction().getCallingConv() == CallingConv::PreserveMost) in getCalleeSavedRegs()
104 if (MF->getFunction().getCallingConv() == CallingConv::Win64) in getCalleeSavedRegs()
108 if (hasSVEArgsOrReturn(MF)) in getCalleeSavedRegs()
114 AArch64RegisterInfo::getDarwinCalleeSavedRegs(const MachineFunction *MF) const { in getDarwinCalleeSavedRegs()
115 assert(MF && "Invalid MachineFunction pointer."); in getDarwinCalleeSavedRegs()
116 assert(MF->getSubtarget<AArch64Subtarget>().isTargetDarwin() && in getDarwinCalleeSavedRegs()
119 if (MF->getFunction().getCallingConv() == CallingConv::CFGuard_Check) in getDarwinCalleeSavedRegs()
122 if (MF->getFunction().getCallingConv() == CallingConv::AArch64_VectorCall) in getDarwinCalleeSavedRegs()
124 if (MF->getFunction().getCallingConv() == CallingConv::AArch64_SVE_VectorCall) in getDarwinCalleeSavedRegs()
127 if (MF->getFunction().getCallingConv() == CallingConv::CXX_FAST_TLS) in getDarwinCalleeSavedRegs()
128 return MF->getInfo<AArch64FunctionInfo>()->isSplitCSR() in getDarwinCalleeSavedRegs()
131 if (MF->getSubtarget<AArch64Subtarget>().getTargetLowering() in getDarwinCalleeSavedRegs()
133 MF->getFunction().getAttributes().hasAttrSomewhere( in getDarwinCalleeSavedRegs()
136 if (MF->getFunction().getCallingConv() == CallingConv::PreserveMost) in getDarwinCalleeSavedRegs()
142 const MachineFunction *MF) const { in getCalleeSavedRegsViaCopy()
143 assert(MF && "Invalid MachineFunction pointer."); in getCalleeSavedRegsViaCopy()
144 if (MF->getFunction().getCallingConv() == CallingConv::CXX_FAST_TLS && in getCalleeSavedRegsViaCopy()
145 MF->getInfo<AArch64FunctionInfo>()->isSplitCSR()) in getCalleeSavedRegsViaCopy()
151 MachineFunction &MF) const { in UpdateCustomCalleeSavedRegs()
152 const MCPhysReg *CSRs = getCalleeSavedRegs(&MF); in UpdateCustomCalleeSavedRegs()
158 if (MF.getSubtarget<AArch64Subtarget>().isXRegCustomCalleeSaved(i)) { in UpdateCustomCalleeSavedRegs()
164 MF.getRegInfo().setCalleeSavedRegs(UpdatedCSRs); in UpdateCustomCalleeSavedRegs()
181 AArch64RegisterInfo::getDarwinCallPreservedMask(const MachineFunction &MF, in getDarwinCallPreservedMask() argument
183 assert(MF.getSubtarget<AArch64Subtarget>().isTargetDarwin() && in getDarwinCallPreservedMask()
196 if (MF.getSubtarget<AArch64Subtarget>() in getDarwinCallPreservedMask()
199 MF.getFunction().getAttributes().hasAttrSomewhere(Attribute::SwiftError)) in getDarwinCallPreservedMask()
207 AArch64RegisterInfo::getCallPreservedMask(const MachineFunction &MF, in getCallPreservedMask() argument
209 bool SCS = MF.getFunction().hasFnAttribute(Attribute::ShadowCallStack); in getCallPreservedMask()
217 if (MF.getSubtarget<AArch64Subtarget>().isTargetDarwin()) { in getCallPreservedMask()
220 return getDarwinCallPreservedMask(MF, CC); in getCallPreservedMask()
230 if (MF.getSubtarget<AArch64Subtarget>().getTargetLowering() in getCallPreservedMask()
232 MF.getFunction().getAttributes().hasAttrSomewhere(Attribute::SwiftError)) in getCallPreservedMask()
243 const MachineFunction &MF) const { in getCustomEHPadPreservedMask()
244 if (MF.getSubtarget<AArch64Subtarget>().isTargetLinux()) in getCustomEHPadPreservedMask()
258 void AArch64RegisterInfo::UpdateCustomCallPreservedMask(MachineFunction &MF, in UpdateCustomCallPreservedMask() argument
260 uint32_t *UpdatedMask = MF.allocateRegMask(); in UpdateCustomCallPreservedMask()
265 if (MF.getSubtarget<AArch64Subtarget>().isXRegCustomCalleeSaved(i)) { in UpdateCustomCallPreservedMask()
283 AArch64RegisterInfo::getThisReturnPreservedMask(const MachineFunction &MF, in getThisReturnPreservedMask() argument
293 if (MF.getSubtarget<AArch64Subtarget>().isTargetDarwin()) in getThisReturnPreservedMask()
303 AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
304 const AArch64FrameLowering *TFI = getFrameLowering(MF); in getReservedRegs()
311 if (TFI->hasFP(MF) || TT.isOSDarwin()) in getReservedRegs()
315 if (MF.getSubtarget<AArch64Subtarget>().isXRegisterReserved(i)) in getReservedRegs()
319 if (hasBasePointer(MF)) in getReservedRegs()
323 if (MF.getFunction().hasFnAttribute(Attribute::SpeculativeLoadHardening)) in getReservedRegs()
330 bool AArch64RegisterInfo::isReservedReg(const MachineFunction &MF, in isReservedReg() argument
332 return getReservedRegs(MF)[Reg]; in isReservedReg()
335 bool AArch64RegisterInfo::isAnyArgRegReserved(const MachineFunction &MF) const { in isAnyArgRegReserved()
338 [this, &MF](MCPhysReg r){return isReservedReg(MF, r);}); in isAnyArgRegReserved()
342 const MachineFunction &MF) const { in emitReservedArgRegCallError()
343 const Function &F = MF.getFunction(); in emitReservedArgRegCallError()
348 bool AArch64RegisterInfo::isAsmClobberable(const MachineFunction &MF, in isAsmClobberable() argument
350 return !isReservedReg(MF, PhysReg); in isAsmClobberable()
358 AArch64RegisterInfo::getPointerRegClass(const MachineFunction &MF, in getPointerRegClass() argument
372 bool AArch64RegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer()
373 const MachineFrameInfo &MFI = MF.getFrameInfo(); in hasBasePointer()
383 if (MFI.hasVarSizedObjects() || MF.hasEHFunclets()) { in hasBasePointer()
384 if (needsStackRealignment(MF)) in hasBasePointer()
387 if (MF.getSubtarget<AArch64Subtarget>().hasSVE()) { in hasBasePointer()
388 const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>(); in hasBasePointer()
409 AArch64RegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister()
410 const AArch64FrameLowering *TFI = getFrameLowering(MF); in getFrameRegister()
411 return TFI->hasFP(MF) ? AArch64::FP : AArch64::SP; in getFrameRegister()
415 const MachineFunction &MF) const { in requiresRegisterScavenging()
420 const MachineFunction &MF) const { in requiresVirtualBaseRegisters()
425 AArch64RegisterInfo::useFPForScavengingIndex(const MachineFunction &MF) const { in useFPForScavengingIndex()
434 const AArch64FrameLowering &TFI = *getFrameLowering(MF); in useFPForScavengingIndex()
435 const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>(); in useFPForScavengingIndex()
436 assert((!MF.getSubtarget<AArch64Subtarget>().hasSVE() || in useFPForScavengingIndex()
439 return TFI.hasFP(MF) && !needsStackRealignment(MF) && !AFI->getStackSizeSVE(); in useFPForScavengingIndex()
443 const MachineFunction &MF) const { in requiresFrameIndexScavenging()
448 AArch64RegisterInfo::cannotEliminateFrame(const MachineFunction &MF) const { in cannotEliminateFrame()
449 const MachineFrameInfo &MFI = MF.getFrameInfo(); in cannotEliminateFrame()
450 if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack()) in cannotEliminateFrame()
482 MachineFunction &MF = *MI->getParent()->getParent(); in needsFrameBaseReg() local
483 const AArch64FrameLowering *TFI = getFrameLowering(MF); in needsFrameBaseReg()
484 MachineFrameInfo &MFI = MF.getFrameInfo(); in needsFrameBaseReg()
504 if (TFI->hasFP(MF) && isFrameOffsetLegal(MI, AArch64::FP, FPOffset)) in needsFrameBaseReg()
541 const MachineFunction &MF = *MBB->getParent(); in materializeFrameBaseRegister() local
543 MF.getSubtarget<AArch64Subtarget>().getInstrInfo(); in materializeFrameBaseRegister()
546 MRI.constrainRegClass(BaseReg, TII->getRegClass(MCID, 0, this, MF)); in materializeFrameBaseRegister()
566 const MachineFunction *MF = MI.getParent()->getParent(); in resolveFrameIndex() local
568 MF->getSubtarget<AArch64Subtarget>().getInstrInfo(); in resolveFrameIndex()
602 MachineFunction &MF = *MBB.getParent(); in eliminateFrameIndex() local
603 const MachineFrameInfo &MFI = MF.getFrameInfo(); in eliminateFrameIndex()
605 MF.getSubtarget<AArch64Subtarget>().getInstrInfo(); in eliminateFrameIndex()
606 const AArch64FrameLowering *TFI = getFrameLowering(MF); in eliminateFrameIndex()
618 TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg, in eliminateFrameIndex()
629 StackOffset Offset = TFI->getNonLocalFrameIndexReference(MF, FrameIndex); in eliminateFrameIndex()
639 const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>(); in eliminateFrameIndex()
652 MF, FrameIndex, FrameReg, /*PreferFP=*/false, /*ForSimm=*/true); in eliminateFrameIndex()
654 MF.getRegInfo().createVirtualRegister(&AArch64::GPR64RegClass); in eliminateFrameIndex()
670 MF, FrameIndex, FrameReg, /*PreferFP=*/false, /*ForSimm=*/true); in eliminateFrameIndex()
689 MachineFunction &MF) const { in getRegPressureLimit()
690 const AArch64FrameLowering *TFI = getFrameLowering(MF); in getRegPressureLimit()
704 - (TFI->hasFP(MF) || TT.isOSDarwin()) // FP in getRegPressureLimit()
705 - MF.getSubtarget<AArch64Subtarget>().getNumXRegisterReserved() in getRegPressureLimit()
706 - hasBasePointer(MF); // X19 in getRegPressureLimit()
730 const MachineFunction &MF) const { in getLocalAddressRegister()
731 const auto &MFI = MF.getFrameInfo(); in getLocalAddressRegister()
732 if (!MF.hasEHFunclets() && !MFI.hasVarSizedObjects()) in getLocalAddressRegister()
734 else if (needsStackRealignment(MF)) in getLocalAddressRegister()
736 return getFrameRegister(MF); in getLocalAddressRegister()