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Lines Matching refs:IntID

189 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> {
190   def: Pat<(IntID IntRegs:$src1), (MI IntRegs:$src1)>,
192   def: Pat<(!cast<Intrinsic>(IntID#"_128B") IntRegs:$src1),
197 multiclass T_V_pat <InstHexagon MI, Intrinsic IntID> {
198   def: Pat<(IntID VectorRegs:$src1),
202   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1),
207 multiclass T_Q_pat <InstHexagon MI, Intrinsic IntID> {
208   def: Pat<(IntID VecPredRegs:$src1),
212   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecPredRegs128B:$src1),
217 multiclass T_WR_pat <InstHexagon MI, Intrinsic IntID> {
218   def: Pat<(IntID VecDblRegs:$src1, IntRegs:$src2),
222   def: Pat<(!cast<Intrinsic>(IntID#"_128B")VecDblRegs128B:$src1, IntRegs:$src2),
227 multiclass T_VR_pat <InstHexagon MI, Intrinsic IntID> {
228   def: Pat<(IntID VectorRegs:$src1, IntRegs:$src2),
232   def: Pat<(!cast<Intrinsic>(IntID#"_128B")VectorRegs128B:$src1, IntRegs:$src2),
237 multiclass T_WV_pat <InstHexagon MI, Intrinsic IntID> {
238   def: Pat<(IntID VecDblRegs:$src1, VectorRegs:$src2),
242   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
249 multiclass T_WW_pat <InstHexagon MI, Intrinsic IntID> {
250   def: Pat<(IntID VecDblRegs:$src1, VecDblRegs:$src2),
254   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
261 multiclass T_VV_pat <InstHexagon MI, Intrinsic IntID> {
262   def: Pat<(IntID VectorRegs:$src1, VectorRegs:$src2),
266   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
273 multiclass T_QR_pat <InstHexagon MI, Intrinsic IntID> {
274   def: Pat<(IntID VecPredRegs:$src1, IntRegs:$src2),
278   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecPredRegs128B:$src1,
285 multiclass T_QQ_pat <InstHexagon MI, Intrinsic IntID> {
286   def: Pat<(IntID VecPredRegs:$src1, VecPredRegs:$src2),
290   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecPredRegs128B:$src1,
297 multiclass T_WWR_pat <InstHexagon MI, Intrinsic IntID> {
298   def: Pat<(IntID VecDblRegs:$src1, VecDblRegs:$src2, IntRegs:$src3),
302   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
311 multiclass T_VVR_pat <InstHexagon MI, Intrinsic IntID> {
312   def: Pat<(IntID VectorRegs:$src1, VectorRegs:$src2, IntRegs:$src3),
316   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
325 multiclass T_WVR_pat <InstHexagon MI, Intrinsic IntID> {
326   def: Pat<(IntID VecDblRegs:$src1, VectorRegs:$src2, IntRegs:$src3),
330   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
339 multiclass T_VWR_pat <InstHexagon MI, Intrinsic IntID> {
340   def: Pat<(IntID VectorRegs:$src1, VecDblRegs:$src2, IntRegs:$src3),
344   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
353 multiclass T_VVV_pat <InstHexagon MI, Intrinsic IntID> {
354   def: Pat<(IntID VectorRegs:$src1, VectorRegs:$src2, VectorRegs:$src3),
358   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
367 multiclass T_WVV_pat <InstHexagon MI, Intrinsic IntID> {
368   def: Pat<(IntID VecDblRegs:$src1, VectorRegs:$src2, VectorRegs:$src3),
372   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
381 multiclass T_QVV_pat <InstHexagon MI, Intrinsic IntID> {
382   def: Pat<(IntID VecPredRegs:$src1, VectorRegs:$src2, VectorRegs:$src3),
386   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecPredRegs128B:$src1,
395 multiclass T_VQR_pat <InstHexagon MI, Intrinsic IntID> {
396   def: Pat<(IntID VectorRegs:$src1, VecPredRegs:$src2, IntRegs:$src3),
400   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
410 multiclass T_QVR_pat <InstHexagon MI, Intrinsic IntID> {
411   def: Pat<(IntID VecPredRegs:$src1, VectorRegs:$src2, IntRegs:$src3),
415   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecPredRegs128B:$src1,
424 multiclass T_VVI_pat <InstHexagon MI, Intrinsic IntID> {
425   def: Pat<(IntID VectorRegs:$src1, VectorRegs:$src2, imm:$src3),
429   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
436 multiclass T_WRI_pat <InstHexagon MI, Intrinsic IntID> {
437   def: Pat<(IntID VecDblRegs:$src1, IntRegs:$src2, imm:$src3),
441   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
448 multiclass T_WWRI_pat <InstHexagon MI, Intrinsic IntID> {
449   def: Pat<(IntID VecDblRegs:$src1, VecDblRegs:$src2, IntRegs:$src3, imm:$src4),
453   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,
462 multiclass T_VVVR_pat <InstHexagon MI, Intrinsic IntID> {
463   def: Pat<(IntID VectorRegs:$src1, VectorRegs:$src2, VectorRegs:$src3,
469   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VectorRegs128B:$src1,
480 multiclass T_WVVR_pat <InstHexagon MI, Intrinsic IntID> {
481   def: Pat<(IntID VecDblRegs:$src1, VectorRegs:$src2, VectorRegs:$src3,
487   def: Pat<(!cast<Intrinsic>(IntID#"_128B") VecDblRegs128B:$src1,