| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64StorePairSuppress.cpp | 150 const MachineOperand *BaseOp; in runOnMachineFunction() local
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| D | AArch64InstrInfo.cpp | 1982 const MachineOperand *&BaseOp, in getMemOperandWithOffset()
1993 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64StorePairSuppress.cpp | 150 const MachineOperand *BaseOp; in runOnMachineFunction() local
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| D | AArch64InstrInfo.cpp | 2139 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
2166 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1573 const MachineOperand &BaseOp = MI.getOperand(2); in MergeBaseUpdateLSDouble() local
1716 const MachineOperand &BaseOp = MI->getOperand(2); in FixInvalidRegPairOp() local
2679 unsigned BaseOp = getBaseOperandIndex(*MI); in AdjustBaseAndOffset() local
2812 int BaseOp = getBaseOperandIndex(Use); in DistributeIncrements() local
2868 int BaseOp = getBaseOperandIndex(*PrePostInc); in DistributeIncrements() local
2889 unsigned BaseOp = getBaseOperandIndex(*Use); in DistributeIncrements() local
2939 int BaseOp = getBaseOperandIndex(MI); in DistributeIncrements() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 758 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
799 const MachineOperand *&BaseOp, in getMemOperandWithOffset()
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| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 758 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
814 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
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| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 96 const MachineOperand *BaseOp = (RelocOp == Op1) ? Op2 : Op1; in checkADDrr() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 93 const MachineOperand *BaseOp = (RelocOp == Op1) ? Op2 : Op1; in checkADDrr() local
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonOptAddrMode.cpp | 363 MachineOperand BaseOp = MID.mayLoad() ? MI->getOperand(1) in processAddUses() local
418 MachineOperand &BaseOp = MID.mayLoad() ? UseMI->getOperand(1) in updateAddUses() local
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| D | HexagonInstrInfo.cpp | 1086 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1101 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1124 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
1140 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
2978 const MachineOperand *BaseOp = getBaseAndOffset(LdSt, Offset, Width); in getMemOperandsWithOffsetWidth() local
3217 const MachineOperand &BaseOp = MI.getOperand(BasePos); in getBaseAndOffset() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonOptAddrMode.cpp | 363 MachineOperand BaseOp = MID.mayLoad() ? MI->getOperand(1) in processAddUses() local
418 MachineOperand &BaseOp = MID.mayLoad() ? UseMI->getOperand(1) in updateAddUses() local
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| D | HexagonInstrInfo.cpp | 1062 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1077 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1100 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
1116 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
2944 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffset()
3183 const MachineOperand &BaseOp = MI.getOperand(BasePos); in getBaseAndOffset() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ImplicitNullChecks.cpp | 367 const MachineOperand *BaseOp; in isSuitableMemoryOp() local
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| D | MachineSink.cpp | 765 const MachineOperand *BaseOp; in SinkingPreventsImplicitNullCheck() local
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| D | TargetInstrInfo.cpp | 1165 const MachineOperand *BaseOp; in describeLoadedValue() local
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| D | MachineScheduler.cpp | 1474 const MachineOperand *BaseOp; member
1563 const MachineOperand *BaseOp; in clusterNeighboringMemOps() local
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| D | ModuloSchedule.cpp | 914 const MachineOperand *BaseOp; in computeDelta() local
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 1075 const MachineInstr &MI, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffset()
1227 const MachineOperand *BaseOp; in describeLoadedValue() local
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| D | MachineSink.cpp | 892 const MachineOperand *BaseOp; in SinkingPreventsImplicitNullCheck() local
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| D | ModuloSchedule.cpp | 913 const MachineOperand *BaseOp; in computeDelta() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1521 const MachineOperand &BaseOp = MI.getOperand(2); in MergeBaseUpdateLSDouble() local
1664 const MachineOperand &BaseOp = MI->getOperand(2); in FixInvalidRegPairOp() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1443 const MachineOperand &BaseOp = MI.getOperand(2); in MergeBaseUpdateLSDouble() local
1579 const MachineOperand &BaseOp = MI->getOperand(2); in FixInvalidRegPairOp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1245 const MachineOperand *&BaseOp, in getMemOperandWithOffset()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3677 auto &BaseOp = MemI.getOperand(MemRefBegin + X86::AddrBaseReg); in getAddrModeFromMemoryOp() local
3745 const MachineOperand *BaseOp = in getMemOperandsWithOffsetWidth() local
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