| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3729 AArch64CC::CondCode CC1, CC2; in LowerBR_CC() local
3898 AArch64CC::CondCode CC1, CC2; in LowerSETCC() local
4049 AArch64CC::CondCode CC1, CC2; in LowerSELECT_CC() local
6791 AArch64CC::CondCode CC1, CC2; in LowerVSETCC() local
|
| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 1484 AArch64CC::CondCode CC1, CC2; in selectCompareBranchFedByFCmp() local
4168 AArch64CC::CondCode CC1, CC2; in emitCSetForFCmp() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5067 AArch64CC::CondCode CC1, CC2; in LowerBR_CC() local
5272 AArch64CC::CondCode CC1, CC2; in LowerSETCC() local
5453 AArch64CC::CondCode CC1, CC2; in LowerSELECT_CC() local
8508 AArch64CC::CondCode CC1, CC2; in LowerVSETCC() local
|
| D | AArch64InstructionSelector.cpp | 2319 AArch64CC::CondCode CC1, CC2; in select() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 500 ARMCC::CondCodes CC2 = (ARMCC::CondCodes)Pred2[0].getImm(); in SubsumesPredicate() local
|
| D | ARMISelLowering.cpp | 3786 ISD::CondCode CC2 = cast<CondCodeSDNode>(Op2.getOperand(4))->get(); in isSaturatingConditional() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1586 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID; in LegalizeSetCCCondCode() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1672 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID; in LegalizeSetCCCondCode() local
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 6304 AArch64CC::CondCode CC1, CC2; in LowerBR_CC() local
6518 AArch64CC::CondCode CC1, CC2; in LowerSETCC() local
6700 AArch64CC::CondCode CC1, CC2; in LowerSELECT_CC() local
10165 AArch64CC::CondCode CC1, CC2; in LowerVSETCC() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 525 ARMCC::CondCodes CC2 = (ARMCC::CondCodes)Pred2[0].getImm(); in SubsumesPredicate() local
|
| D | ARMISelLowering.cpp | 4789 ISD::CondCode CC2 = cast<CondCodeSDNode>(Op2.getOperand(4))->get(); in isSaturatingConditional() local
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1725 ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID; in LegalizeSetCCCondCode() local
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 581 ARMCC::CondCodes CC2 = (ARMCC::CondCodes)Pred2[0].getImm(); in SubsumesPredicate() local
|
| D | ARMISelLowering.cpp | 5061 ISD::CondCode CC2 = cast<CondCodeSDNode>(Op2.getOperand(4))->get(); in isSaturatingConditional() local
|