| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 119 static bool isDispOrCDisp8(uint64_t TSFlags, int Value, int &ImmOffset) { in isDispOrCDisp8()
579 int ImmOffset = 0; in emitMemModRMByte() local
606 int ImmOffset = 0; in emitMemModRMByte() local
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 615 int ImmOffset = MI.getOperand(2).getImm() + Offset; in expandSVESpillFill() local
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1335 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1354 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
1446 int64_t ImmOffset = 0; in applyMappingSBufferLoad() local
1722 unsigned ImmOffset; in splitBufferOffsets() local
1805 unsigned ImmOffset; in selectStoreIntrinsic() local
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| D | AMDGPULegalizerInfo.cpp | 3496 unsigned ImmOffset = TotalConstOffset; in splitBufferOffsets() local
3624 unsigned ImmOffset; in legalizeBufferStore() local
3732 unsigned ImmOffset; in legalizeBufferLoad() local
3922 unsigned ImmOffset; in legalizeBufferAtomic() local
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| D | AMDGPUISelDAGToDAG.cpp | 1820 int64_t ImmOffset = 0; in SelectGlobalSAddr() local
2516 int ImmOffset = 0; in SelectDS_GWS() local
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| D | AMDGPUInstructionSelector.cpp | 1326 unsigned ImmOffset; in selectDSGWSIntrinsic() local
3490 int64_t ImmOffset = 0; in selectGlobalSAddr() local
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| D | SIISelLowering.cpp | 7811 unsigned ImmOffset = C1->getZExtValue(); in splitBufferOffsets() local
7852 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
7864 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 534 int ImmOffset = 0; in emitMemModRMByte() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 574 int ImmOffset = 0; in emitMemModRMByte() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 923 unsigned ImmOffset = TotalConstOffset; in splitBufferOffsets() local
990 unsigned ImmOffset; in selectStoreIntrinsic() local
|
| D | AMDGPURegisterBankInfo.cpp | 1301 unsigned ImmOffset; in splitBufferOffsets() local
1384 unsigned ImmOffset; in selectStoreIntrinsic() local
|
| D | AMDGPUISelDAGToDAG.cpp | 2286 int ImmOffset = 0; in SelectDS_GWS() local
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| D | SIISelLowering.cpp | 7150 unsigned ImmOffset = C1->getZExtValue(); in splitBufferOffsets() local
7191 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
7202 uint32_t SOffset, ImmOffset; in setBufferOffsets() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 1037 SDValue &ImmOffset, in SelectMUBUFIntrinsicVOffset()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.cpp | 1269 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset, in splitMUBUFOffset()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.h | 175 Operand *const ImmOffset; variable
|
| D | IceInstMIPS32.cpp | 47 Operand *ImmOffset, AddrMode Mode) in OperandMIPS32Mem()
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| D | IceInstARM32.h | 158 ConstantInteger32 *ImmOffset; variable
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| D | IceInstARM32.cpp | 321 ConstantInteger32 *ImmOffset, AddrMode Mode) in OperandARM32Mem()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 3698 SDValue Base, RegOffset, ImmOffset; in Select() local
3727 SDValue Base, RegOffset, ImmOffset; in Select() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.cpp | 1527 bool splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset, uint32_t &ImmOffset, in splitMUBUFOffset()
|