| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFrameLowering.cpp | 141 unsigned SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
195 unsigned SPReg = 0; in emitEpilogue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 117 Register SPReg = getSPReg(STI); in emitPrologue() local
251 Register SPReg = getSPReg(STI); in emitEpilogue() local
427 Register SPReg = RISCV::X2; in eliminateCallFramePseudoInstr() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFrameLowering.cpp | 174 unsigned SPReg = WebAssembly::SP32; in emitPrologue() local
240 unsigned SPReg = 0; in emitEpilogue() local
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFrameLowering.cpp | 229 unsigned SPReg = getSPReg(MF); in emitPrologue() local
292 unsigned SPReg = 0; in emitEpilogue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 95 unsigned ScratchRsrcReg, unsigned SPReg, int FI) { in buildPrologSpill()
143 unsigned ScratchRsrcReg, unsigned SPReg, int FI) { in buildEpilogReload()
493 unsigned SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
1112 unsigned SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 321 Register SPReg = getSPReg(STI); in emitPrologue() local
506 Register SPReg = getSPReg(STI); in emitEpilogue() local
708 Register SPReg = RISCV::X2; in eliminateCallFramePseudoInstr() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RetpolineThunks.cpp | 232 const unsigned SPReg = Is64Bit ? X86::RSP : X86::ESP; in insertRegReturnAddrClobber() local
|
| D | X86CallLowering.cpp | 111 Register SPReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
|
| D | X86FrameLowering.cpp | 1544 unsigned SPReg; in getPSPSlotOffsetFromSP() local
2666 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 141 Register ScratchRsrcReg, Register SPReg, int FI) { in buildPrologSpill()
226 Register ScratchRsrcReg, Register SPReg, int FI) { in buildEpilogReload()
625 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
1394 Register SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
|
| /external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 136 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86IndirectThunks.cpp | 246 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; in populateThunk() local
|
| D | X86CallLowering.cpp | 110 auto SPReg = in getStackAddress() local
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 128 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 136 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 645 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
1214 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in inlineStackProbe() local
1515 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 102 Register SPReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 101 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress() local
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 747 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
1129 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 831 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
1402 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 294 Register SPReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 265 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP)); in getStackAddress() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 156 Register SPReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 1437 unsigned SPReg; in getPSPSlotOffsetFromSP() local
2448 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
|
| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64CallLowering.cpp | 229 Register SPReg; member
|