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Searched defs:enablePostRAScheduler (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Target/
DTargetSubtargetInfo.cpp48 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() function in TargetSubtargetInfo
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSubtargetInfo.cpp53 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() function in TargetSubtargetInfo
DPostRASchedulerList.cpp266 bool PostRAScheduler::enablePostRAScheduler( in enablePostRAScheduler() function in PostRAScheduler
/external/llvm-project/llvm/lib/CodeGen/
DTargetSubtargetInfo.cpp52 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() function in TargetSubtargetInfo
DPostRASchedulerList.cpp264 bool PostRAScheduler::enablePostRAScheduler( in enablePostRAScheduler() function in PostRAScheduler
/external/llvm/lib/Target/Mips/
DMipsSubtarget.cpp134 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in MipsSubtarget
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCSubtarget.cpp202 bool PPCSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in PPCSubtarget
/external/llvm/lib/Target/PowerPC/
DPPCSubtarget.cpp189 bool PPCSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in PPCSubtarget
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCSubtarget.cpp194 bool PPCSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in PPCSubtarget
/external/llvm-project/llvm/lib/Target/Mips/
DMipsSubtarget.cpp225 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in MipsSubtarget
/external/llvm/lib/Target/ARM/
DARMSubtarget.cpp295 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler() function in ARMSubtarget
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSubtarget.cpp225 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in MipsSubtarget
/external/llvm/lib/Target/Hexagon/
DHexagonSubtarget.h109 bool enablePostRAScheduler() const override { return true; } in enablePostRAScheduler() function
/external/llvm-project/llvm/lib/Target/ARM/
DARMSubtarget.cpp393 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler() function in ARMSubtarget
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMSubtarget.cpp388 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler() function in ARMSubtarget
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonSubtarget.h190 bool enablePostRAScheduler() const override { return true; } in enablePostRAScheduler() function
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonSubtarget.h237 bool enablePostRAScheduler() const override { return true; } in enablePostRAScheduler() function
/external/llvm/lib/Target/AArch64/
DAArch64Subtarget.h153 bool enablePostRAScheduler() const override { in enablePostRAScheduler() function
/external/llvm/lib/CodeGen/
DPostRASchedulerList.cpp266 bool PostRAScheduler::enablePostRAScheduler( in enablePostRAScheduler() function in PostRAScheduler
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64Subtarget.h268 bool enablePostRAScheduler() const override { in enablePostRAScheduler() function
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64Subtarget.h298 bool enablePostRAScheduler() const override { in enablePostRAScheduler() function