Home
last modified time | relevance | path

Searched defs:reg_offset (Results 1 – 25 of 29) sorted by relevance

12

/external/arm-trusted-firmware/drivers/arm/ccn/
Dccn.c575 unsigned int reg_offset, unsigned long long val) in ccn_write_node_reg()
601 unsigned int reg_offset) in ccn_read_node_reg()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_winsys.c145 unsigned reg_offset, in radv_amdgpu_winsys_read_registers()
/external/mesa3d/src/amd/common/
Dac_shadowed_regs.c2935 unsigned reg_offset = R_02835C_PA_SC_TILE_STEERING_OVERRIDE; in ac_emulate_clear_state() local
2953 unsigned reg_offset, unsigned count) in ac_check_shadowed_regs()
Dac_debug.c221 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset, in ac_parse_set_reg_packet()
/external/arm-trusted-firmware/plat/rockchip/rk3288/drivers/pmu/
Dpmu.c125 static const uint32_t reg_offset[] = { GRF_UOC0_CON0, GRF_UOC1_CON0, in rk3288_sleep_disable_osc() local
/external/mesa3d/src/intel/compiler/
Dbrw_vec4_visitor.cpp1340 src_reg *reladdr, int reg_offset) in get_scratch_offset()
1389 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read() local
1418 int reg_offset = base_offset + inst->dst.offset / REG_SIZE; in emit_scratch_write() local
1634 int reg_offset = base_offset + src.offset / 16; in emit_pull_constant_load() local
Dbrw_ir_vec4.h232 reg_offset(const backend_reg &r) in reg_offset() function
Dbrw_ir_fs.h181 reg_offset(const fs_reg &r) in reg_offset() function
/external/llvm-project/lldb/unittests/tools/lldb-server/tests/
DTestClient.cpp222 uint32_t reg_offset = 0; in qRegisterInfos() local
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_winsys.c261 unsigned reg_offset, in amdgpu_read_registers()
/external/mesa3d/src/gallium/drivers/r600/
Deg_debug.c134 unsigned reg_offset) in ac_parse_set_reg_packet()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_winsys.c755 unsigned reg_offset, in radeon_read_registers()
/external/llvm-project/lldb/source/Plugins/Process/FreeBSDRemote/
DNativeRegisterContextFreeBSD_x86_64.cpp620 size_t reg_offset) { in GetOffsetRegSetData()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_build_pm4.h39 #define SI_CHECK_SHADOWED_REGS(reg_offset, count) argument
/external/arm-trusted-firmware/drivers/marvell/comphy/
Dphy-comphy-3700.c262 static void comphy_usb3_set_direct(uintptr_t addr, uint32_t reg_offset, in comphy_usb3_set_direct()
/external/elfutils/libdw/
Dcfi.h127 reg_offset, /* DW_CFA_offset_extended et al */ enumerator
/external/llvm-project/lldb/source/Plugins/Process/Utility/
DDynamicRegisterInfo.cpp456 uint32_t reg_offset = 0; in Finalize() local
/external/mesa3d/src/panfrost/midgard/
Dmidgard_ra.c45 offset_swizzle(unsigned *swizzle, unsigned reg_offset, unsigned srcshift, unsigned dstshift, unsign… in offset_swizzle()
/external/crosvm/hypervisor/src/kvm/
Dx86_64.rs814 let reg_offset = 16 * reg; in from() localVariable
834 let reg_offset = 16 * reg; in from() localVariable
/external/crosvm/devices/src/pci/
Dpci_configuration.rs345 let reg_offset = reg_idx * 4 + offset as usize; in write_reg() localVariable
/external/mesa3d/src/intel/tools/
Daubinator_viewer.cpp108 handle_reg_write(void *user_data, uint32_t reg_offset, uint32_t reg_value) in handle_reg_write()
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_ir.h600 int reg_offset = select.sel() - array->base_gpr.sel(); in get_final_gpr() local
/external/llvm-project/lldb/source/Plugins/Process/gdb-remote/
DProcessGDBRemote.cpp454 uint32_t reg_offset = LLDB_INVALID_INDEX32; in BuildDynamicRegisterInfo() local
4283 uint32_t reg_offset = LLDB_INVALID_INDEX32; in ParseRegisters() local
/external/llvm-project/lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/
DRenderScriptRuntime.cpp303 static const uint32_t reg_offset = 4; in GetArgsMipsel() local
348 static const uint32_t reg_offset = 4; in GetArgsMips64el() local
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc1741 Register reg_offset = mem_op.GetRegisterOffset(); in ComputeAddress() local

12