/external/arm-trusted-firmware/drivers/arm/gic/v2/ |
D | gicdv2_helpers.c | 249 unsigned int reg_val = gicd_read_igroupr(base, id); in gicd_get_igroupr() local 257 unsigned int reg_val = gicd_read_igroupr(base, id); in gicd_set_igroupr() local 265 unsigned int reg_val = gicd_read_igroupr(base, id); in gicd_clr_igroupr() local 301 unsigned int reg_val = gicd_read_isactiver(base, id); in gicd_get_isactiver() local 333 uint32_t reg_val = gicd_read_icfgr(base, id); in gicd_set_icfgr() local
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/external/arm-trusted-firmware/drivers/arm/gic/common/ |
D | gic_common.c | 251 unsigned int reg_val = gicd_read_igroupr(base, id); in gicd_get_igroupr() local 259 unsigned int reg_val = gicd_read_igroupr(base, id); in gicd_set_igroupr() local 267 unsigned int reg_val = gicd_read_igroupr(base, id); in gicd_clr_igroupr() local 303 unsigned int reg_val = gicd_read_isactiver(base, id); in gicd_get_isactiver() local 335 uint32_t reg_val = gicd_read_icfgr(base, id); in gicd_set_icfgr() local
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/external/arm-trusted-firmware/drivers/arm/smmu/ |
D | smmu_v3.c | 19 uint32_t reg_val; in smmuv3_poll() local
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/external/llvm-project/lldb/source/Core/ |
D | DumpRegisterValue.cpp | 18 bool lldb_private::DumpRegisterValue(const RegisterValue ®_val, Stream *s, in DumpRegisterValue()
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/external/arm-trusted-firmware/plat/socionext/synquacer/ |
D | sq_bl31_setup.c | 121 unsigned int reg_val; in sq_configure_sys_timer() local
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/external/arm-trusted-firmware/plat/arm/common/ |
D | arm_common.c | 132 unsigned int reg_val; in arm_configure_sys_timer() local
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/external/arm-trusted-firmware/plat/marvell/armada/a8k/common/ |
D | plat_pm.c | 119 uint32_t reg_val; in plat_marvell_cpu_powerdown() local 227 uint32_t reg_val; in plat_marvell_cpu_powerup() local
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D | plat_ble_setup.c | 372 uint32_t reg_val, avs_workpoint, freq_pidi_mode; in ble_plat_svc_config() local
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/external/crosvm/devices/src/ |
D | pl030.rs | 87 let reg_val = u32::from_ne_bytes(*data_array); in write() localVariable
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/external/arm-trusted-firmware/drivers/marvell/mochi/ |
D | ap807_setup.c | 283 uint32_t reg_val; in ap807_dram_phy_access_config() local
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/external/arm-trusted-firmware/drivers/brcm/emmc/ |
D | emmc_chal_sd.c | 194 uint32_t reg_val; in chal_sd_init() local
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/external/llvm-project/lldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/ |
D | RenderScriptRuntime.cpp | 197 RegisterValue reg_val; in GetArgsX86_64() local 241 RegisterValue reg_val; in GetArgsArm() local 280 RegisterValue reg_val; in GetArgsAarch64() local 320 RegisterValue reg_val; in GetArgsMipsel() local 364 RegisterValue reg_val; in GetArgsMips64el() local
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/external/mesa3d/src/gallium/drivers/iris/ |
D | iris_state.c | 688 uint32_t reg_val; in init_glk_barrier_mode() local 748 uint32_t reg_val; in iris_emit_l3_config() local 789 uint32_t reg_val; in iris_enable_obj_preemption() local 919 uint32_t reg_val; in iris_init_common_context() local 946 uint32_t reg_val; in iris_init_render_context() local 1621 uint32_t reg_val; in genX() local
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/external/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
D | EmulateInstructionARM.cpp | 2899 uint32_t reg_val = ReadCoreReg(Bits32(opcode, 2, 0), &success); in EmulateCB() local 3323 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateCMNImm() local 3440 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateCMPImm() local 9215 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateRSBImm() local 9352 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateRSCImm() local 9489 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateSBCImm() local 9665 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateSUBImmThumb() local 9732 uint32_t reg_val = ReadCoreReg(Rn, &success); in EmulateSUBImmARM() local
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/external/llvm-project/lldb/source/Target/ |
D | RegisterContextUnwind.cpp | 303 addr_t reg_val; in InitializeNonZerothFrame() local
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/external/llvm-project/lldb/source/Plugins/ABI/PowerPC/ |
D | ABISysV_ppc64.cpp | 457 RegisterValue reg_val; in GetRawData() local
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/external/mesa3d/src/gallium/drivers/r600/ |
D | evergreen_state.c | 4793 uint32_t reg_val = (base_reg_0 + atomic->hw_idx * 4 - EVERGREEN_CONTEXT_REG_OFFSET) >> 2; in evergreen_emit_set_append_cnt() local 4816 uint32_t reg_val = (base_reg_0 + atomic->hw_idx * 4) >> 2; in evergreen_emit_event_write_eos() local
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/external/mesa3d/src/freedreno/decode/ |
D | cffdec.c | 321 reg_val(uint32_t regbase) in reg_val() function
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