/external/freetype/builds/amiga/ |
D | makefile | 55 CC = ppc-morphos-gcc macro 65 $(CC) -c $(CFLAGS) -o $@ $< 68 $(CC) -c $(CFLAGS) -o $@ $< 71 $(CC) -c $(CFLAGS) -o $@ $< 75 $(CC) -c $(CFLAGS) -o $@ $< 78 $(CC) -c $(CFLAGS) -o $@ $< 82 $(CC) -c $(CFLAGS) -o $@ $< 88 $(CC) -c $(CFLAGS) -o $@ $< 91 $(CC) -c $(CFLAGS) -o $@ $< 94 $(CC) -c $(CFLAGS) -o $@ $< [all …]
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D | makefile.os4 | 50 CC = ppc-amigaos-gcc 68 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftbase.c 71 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftinit.c 74 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftsystem.c 78 $(CC) -c $(CFLAGS) -o $@ src/base/ftsystem.c 84 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftbbox.c 87 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftbdf.c 90 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftbitmap.c 93 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftcid.c 96 $(CC) -c $(CFLAGS) -o $@ /FT/src/base/ftdebug.c [all …]
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/external/OpenCSD/decoder/tests/snapshots/TC2/pkt_proc_logs/ |
D | trc_pkt_lister-dcd-0x13.ppl | 36 Idx:26579; ID:13; RCTDL_GEN_TRC_ELEM_TIMESTAMP( [ TS=0x0082f9d18bcc]; [CC=0]; ) 38 Idx:26590; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018d82:[0xc0018d8a] E BR [CC=522]… 40 Idx:26593; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018dc8:[0xc0018dd6] N BR [CC=23];… 42 …; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018dd6:[0xc0018dde] E BR b+link [CC=15]; ) 44 Idx:26596; ID:13; RCTDL_GEN_TRC_ELEM_TRACE_ON( [begin or filter] [CC=51]; ) 46 …4; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018dde:[0xc0018de4] E BR b+link [CC=1]; ) 48 Idx:26605; ID:13; RCTDL_GEN_TRC_ELEM_TRACE_ON( [begin or filter] [CC=121]; ) 50 Idx:26614; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018de4:[0xc0018de6] E BR [CC=1]; ) 52 Idx:26615; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018d8a:[0xc0018d96] N BR [CC=16];… 54 …7; ID:13; RCTDL_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xc0018d96:[0xc0018da4] E BR b+link [CC=3]; ) [all …]
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/external/llvm-project/llvm/test/CodeGen/ARM/GlobalISel/ |
D | arm-instruction-select-cmp.mir | 72 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg 73 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr 74 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 0 /* CC::eq */, $cpsr 75 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg 77 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 102 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg 103 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr 104 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 1 /* CC::ne */, $cpsr 105 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg 107 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 [all …]
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D | thumb-instruction-select-cmp.mir | 32 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 33 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr 34 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 0 /* CC::eq */, $cpsr 35 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg 37 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 62 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 63 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr 64 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 1 /* CC::ne */, $cpsr 65 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg 67 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 [all …]
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D | arm-call-lowering.ll | 12 ; NOV4T: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 14 ; NOV4T: ADJCALLSTACKUP 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 15 ; NOV4T: MOVPCLR 14 /* CC::al */, $noreg 20 ; V4T: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 22 ; V4T: ADJCALLSTACKUP 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 23 ; V4T: BX_RET 14 /* CC::al */, $noreg 28 ; V5T: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 30 ; V5T: ADJCALLSTACKUP 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp 31 ; V5T: BX_RET 14 /* CC::al */, $noreg 36 ; THUMB: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def $sp, implicit $sp [all …]
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/external/icu/icu4c/source/ |
D | runConfigureICU | 58 Solaris Use the Sun cc/CC compilers on Solaris 60 SolarisX86 Use the Sun cc/CC compilers on Solaris x86 138 CC=`which xlclang`; export CC 139 if [ ! -x $CC ]; then 152 CC=gcc; export CC 160 CC=`which cc`; export CC 161 CXX=`which CC`; export CXX 168 CC=gcc; export CC 176 CC=`which cc`; export CC 177 CXX=`which CC`; export CXX [all …]
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/external/lz4/ |
D | Makefile | 132 clangtest: CC = clang macro 134 $(CC) -v 135 @CFLAGS="$(CFLAGS)" $(MAKE) -C $(LZ4DIR) all CC=$(CC) 136 @CFLAGS="$(CFLAGS)" $(MAKE) -C $(PRGDIR) all CC=$(CC) 137 @CFLAGS="$(CFLAGS)" $(MAKE) -C $(TESTDIR) all CC=$(CC) 141 @CFLAGS="-O3 -Werror -Wconversion -Wno-sign-conversion" $(MAKE) -C $(LZ4DIR) all CC=clang 142 @CFLAGS="-O3 -Werror -Wconversion -Wno-sign-conversion" $(MAKE) -C $(PRGDIR) native CC=clang 143 @CFLAGS="-O3 -Werror -Wconversion -Wno-sign-conversion" $(MAKE) -C $(TESTDIR) native CC=clang 146 CC=clang CFLAGS="-O3 -g -fsanitize=undefined" $(MAKE) test FUZZER_TIME="-T30s" NB_LOOPS=-i1 161 @$(CC) -v [all …]
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/external/llvm-project/llvm/test/CodeGen/ARM/ |
D | machine-outliner-default.mir | 23 ; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg 25 ; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg 28 ; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg 30 ; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg 33 ; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg 35 ; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg 38 ; CHECK: $r2 = MOVr $lr, 14 /* CC::al */, $noreg, $noreg 39 ; CHECK: BX_RET 14 /* CC::al */, $noreg 77 ; CHECK: early-clobber $sp = t2STR_PRE killed $lr, $sp, -8, 14 /* CC::al */, $noreg 78 ; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_1 [all …]
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D | machine-outliner-lr-regsave.mir | 21 ; CHECK: $r6 = MOVr killed $lr, 14 /* CC::al */, $noreg, $noreg 23 ; CHECK: $lr = MOVr killed $r6, 14 /* CC::al */, $noreg, $noreg 26 ; CHECK: $r6 = MOVr killed $lr, 14 /* CC::al */, $noreg, $noreg 28 ; CHECK: $lr = MOVr killed $r6, 14 /* CC::al */, $noreg, $noreg 31 ; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg 33 ; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg 36 ; CHECK: $r6 = MOVr killed $lr, 14 /* CC::al */, $noreg, $noreg 38 ; CHECK: $lr = MOVr killed $r6, 14 /* CC::al */, $noreg, $noreg 41 ; CHECK: $r2 = MOVr $lr, 14 /* CC::al */, $noreg, $noreg 42 ; CHECK: BX_RET 14 /* CC::al */, $noreg [all …]
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D | machine-outliner-thunk.ll | 19 ; ARM: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr 24 ; ARM-NEXT: renamable $r0 = ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg 25 ; ARM-NEXT: $sp = frame-destroy LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r11, def $pc, impli… 30 ; THUMB: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr 34 ; THUMB-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0{{.*}} 35 ; THUMB-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 8, 14 /* CC::al */, $noreg 36 ; THUMB-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc 41 ; MACHO: early-clobber $sp = frame-setup t2STR_PRE killed $lr, $sp, -4, 14 /* CC::al */, $n… 44 ; MACHO-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0{{.*}} 45 ; MACHO-NEXT: renamable $r0, dead $cpsr = tADDi8 killed renamable $r0, 8, 14 /* CC::al */, $noreg [all …]
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/external/llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/ |
D | no-dec-reorder.mir | 113 …; CHECK: renamable $r2 = t2LDRSHi12 renamable $r1, 2, 14 /* CC::al */, $noreg :: (load 2 from %i… 114 ; CHECK: t2CMPri renamable $r2, -1, 14 /* CC::al */, $noreg, implicit-def $cpsr 115 ; CHECK: tBcc %bb.6, 13 /* CC::le */, killed $cpsr 119 ; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 121 …; CHECK: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit … 122 ; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate 123 ; CHECK: tB %bb.2, 14 /* CC::al */, $noreg 127 ; CHECK: renamable $r1 = tUXTH killed renamable $r2, 14 /* CC::al */, $noreg 131 …; CHECK: renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load 4 from %ir.inf… 132 …; CHECK: renamable $r2 = tLDRHi killed renamable $r2, 1, 14 /* CC::al */, $noreg :: (load 2 from… [all …]
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D | biquad-cascade-default.mir | 205 …; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, kil… 216 ; CHECK: $sp = frame-setup tSUBspi $sp, 10, 14 /* CC::al */, $noreg 218 …; CHECK: $r6, $r5 = t2LDRDi8 $r0, 8, 14 /* CC::al */, $noreg :: (load 4 from %ir.i7), (load 4 fr… 219 ; CHECK: $r8 = tMOVr killed $r3, 14 /* CC::al */, $noreg 220 …; CHECK: $r3, $r7 = t2LDRDi8 killed $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.i), (loa… 221 ; CHECK: renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg 222 …; CHECK: t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r8 :: (store 4 into %stack.9), … 223 ; CHECK: $r12 = tMOVr killed $r2, 14 /* CC::al */, $noreg 224 ; CHECK: renamable $r2 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load 4 from %stack.9) 225 ; CHECK: tB %bb.2, 14 /* CC::al */, $noreg [all …]
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D | biquad-cascade-optsize.mir | 213 …; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, kil… 224 ; CHECK: $sp = frame-setup tSUBspi $sp, 10, 14 /* CC::al */, $noreg 226 …; CHECK: $r6, $r5 = t2LDRDi8 $r0, 8, 14 /* CC::al */, $noreg :: (load 4 from %ir.i7), (load 4 fr… 227 ; CHECK: $r8 = tMOVr killed $r3, 14 /* CC::al */, $noreg 228 …; CHECK: $r3, $r7 = t2LDRDi8 killed $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.i), (loa… 229 ; CHECK: renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg 230 …; CHECK: t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r8 :: (store 4 into %stack.9), … 231 ; CHECK: $r12 = tMOVr killed $r2, 14 /* CC::al */, $noreg 232 ; CHECK: renamable $r2 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load 4 from %stack.9) 236 …; CHECK: $r9, $r4 = t2LDRDi8 $r3, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.i14), (load 4 f… [all …]
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D | biquad-cascade-optsize-strd-lr.mir | 208 …; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, kil… 219 ; CHECK: $sp = frame-setup tSUBspi $sp, 10, 14 /* CC::al */, $noreg 221 …; CHECK: $r7, $r5 = t2LDRDi8 $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.i), (load 4 fro… 222 …; CHECK: $r6, $r4 = t2LDRDi8 killed $r0, 8, 14 /* CC::al */, $noreg :: (load 4 from %ir.i7), (lo… 223 ; CHECK: renamable $r0 = t2RSBri killed renamable $r6, 31, 14 /* CC::al */, $noreg, $noreg 224 …; CHECK: t2STMIA $sp, 14 /* CC::al */, $noreg, killed $r0, $r2, $r3 :: (store 4 into %stack.9), … 228 …; CHECK: $r9, $r8 = t2LDRDi8 $r7, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.i14), (load 4 f… 229 ; CHECK: renamable $lr = nuw t2ADDri renamable $r5, 20, 14 /* CC::al */, $noreg, $noreg 230 …; CHECK: $r6, $r12 = t2LDRDi8 $r7, 8, 14 /* CC::al */, $noreg :: (load 4 from %ir.i22), (load 4 … 231 ; CHECK: t2CMPri renamable $r3, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr [all …]
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D | no-dec-cbnz.mir | 114 …; CHECK-LOB: renamable $r2 = t2LDRSHi12 renamable $r1, 2, 14 /* CC::al */, $noreg :: (load 2 fro… 115 ; CHECK-LOB: t2CMPri renamable $r2, -1, 14 /* CC::al */, $noreg, implicit-def $cpsr 116 ; CHECK-LOB: tBcc %bb.5, 13 /* CC::le */, killed $cpsr 124 ; CHECK-LOB: renamable $r1 = tUXTH killed renamable $r2, 14 /* CC::al */, $noreg 128 …; CHECK-LOB: renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load 4 from %ir… 129 …; CHECK-LOB: renamable $r2 = tLDRHi killed renamable $r2, 1, 14 /* CC::al */, $noreg :: (load 2 … 130 …; CHECK-LOB: tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $c… 132 ; CHECK-LOB: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate 136 …; CHECK-LOB: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 f… 146 …; CHECK-LOB: renamable $r1 = t2LDRSHi12 killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (loa… [all …]
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D | vaddv.mir | 849 …; CHECK: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, im… 853 ; CHECK: tCMPi8 renamable $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 855 ; CHECK: tPOP_RET 0 /* CC::eq */, killed $cpsr, def $r7, def $pc, implicit killed $itstate 865 …ble $r1 = t2STR_POST killed renamable $r12, killed renamable $r1, 4, 14 /* CC::al */, $noreg :: (s… 868 ; CHECK: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc 873 … frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp 877 tCMPi8 renamable $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 879 tPOP_RET 0 /* CC::eq */, killed $cpsr, def $r7, def $pc, implicit killed $itstate 885 renamable $r3, dead $cpsr = tADDi3 renamable $r2, 3, 14 /* CC::al */, $noreg 886 renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg [all …]
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D | revertcallearly.mir | 70 …; CHECK: [[t2LDRi12_:%[0-9]+]]:gprnopc = t2LDRi12 [[t2MOVi32imm]], 0, 14 /* CC::al */, $noreg ::… 71 ; CHECK: t2CMPri [[t2LDRi12_]], 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 72 ; CHECK: t2Bcc %bb.4, 4 /* CC::mi */, $cpsr 73 ; CHECK: t2B %bb.1, 14 /* CC::al */, $noreg 76 ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = t2ADDri [[t2LDRi12_]], 1, 14 /* CC::al */, $noreg, $noreg 77 ; CHECK: [[tMOVr:%[0-9]+]]:gprlr = tMOVr killed [[t2ADDri]], 14 /* CC::al */, $noreg 80 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 24, 14 /* CC::al */, $noreg, $noreg 84 ; CHECK: ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp 87 …; CHECK: tBL 14 /* CC::al */, $noreg, &__aeabi_memclr4, csr_aapcs, implicit-def dead $lr, implic… 88 ; CHECK: ADJCALLSTACKUP 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp [all …]
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/external/rust/crates/libz-sys/src/zlib-ng/arch/x86/ |
D | Makefile.in | 5 CC= 34 $(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $(SRCDIR)/x86.c 37 $(CC) $(SFLAGS) $(INCLUDES) -c -o $@ $(SRCDIR)/x86.c 40 $(CC) $(CFLAGS) $(SSE2FLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/chunkset_sse.c 43 $(CC) $(SFLAGS) $(SSE2FLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/chunkset_sse.c 46 $(CC) $(CFLAGS) $(AVX2FLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/compare258_avx.c 49 $(CC) $(SFLAGS) $(AVX2FLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/compare258_avx.c 52 $(CC) $(CFLAGS) $(SSE4FLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/compare258_sse.c 55 $(CC) $(SFLAGS) $(SSE4FLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/compare258_sse.c 58 $(CC) $(CFLAGS) $(SSE4FLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/insert_string_sse.c [all …]
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/external/libexif/contrib/watcom/ |
D | Makefile | 28 CC= wcl386 macro 97 $(CC) -c $(CFLAGS) $[* 100 $(CC) -c $(CFLAGS) $[* 103 $(CC) -c $(CFLAGS) $[* 106 $(CC) -c $(CFLAGS) $[* 109 $(CC) -c $(CFLAGS) $[* 112 $(CC) -c $(CFLAGS) $[* 115 $(CC) -c $(CFLAGS) $[* 118 $(CC) -c $(CFLAGS) $[* 121 $(CC) -c $(CFLAGS) $[* [all …]
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/external/llvm-project/llvm/test/CodeGen/Thumb/ |
D | peephole-mi.mir | 32 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 33 ; CHECK: %3:tgpr, $cpsr = tADC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr 34 ; CHECK: tBcc %bb.2, 1 /* CC::ne */, $cpsr 35 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 38 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 40 ; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 42 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 75 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 76 ; CHECK: %3:tgpr, dead $cpsr = tADC [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg, implicit $cpsr 77 ; CHECK: %4:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg [all …]
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D | peephole-cmp.mir | 27 ; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 28 ; CHECK: tBcc %bb.2, 8 /* CC::hi */, $cpsr 29 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 32 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 34 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 36 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 69 ; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 70 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr 71 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 74 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 [all …]
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/external/fft2d/src/fft2d/fft2d/sample2d/ |
D | Makefile | 3 CC = gcc macro 24 $(CC) fft4f2dt.o fft4f2d.o alloc.o -lm -o fft4f2dt 27 $(CC) fftsg2dt.o fftsg2d.o fftsg.o alloc.o -lm -o fftsg2dt 30 $(CC) fftsg3dt.o fftsg3d.o fftsg.o alloc.o -lm -o fftsg3dt 33 $(CC) shrtdctt.o shrtdct.o -lm -o shrtdctt 37 $(CC) $(CFLAGS) $(OFLAGS) -c fft4f2dt.c -o fft4f2dt.o 40 $(CC) $(CFLAGS) $(OFLAGS) -c fftsg2dt.c -o fftsg2dt.o 43 $(CC) $(CFLAGS) $(OFLAGS) -c fftsg3dt.c -o fftsg3dt.o 46 $(CC) $(CFLAGS) $(OFLAGS) -c shrtdctt.c -o shrtdctt.o 50 $(CC) $(CFLAGS) $(OFLAGS) -c ../fft4f2d.c -o fft4f2d.o [all …]
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/external/google-fruit/extras/scripts/ |
D | postsubmit-helper.sh | 11 export CC=gcc-4.9 16 export CC=gcc-5 21 export CC=gcc-6 26 export CC=gcc-7 31 export CC=gcc-8 36 export CC=gcc-9 41 export CC=gcc-10 46 export CC=clang-3.5 51 export CC=clang-3.6 56 export CC=clang-3.7 [all …]
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/external/rust/crates/libz-sys/src/zlib-ng/arch/arm/ |
D | Makefile.in | 5 CC= 26 $(CC) $(CFLAGS) $(NEONFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/adler32_neon.c 29 $(CC) $(SFLAGS) $(NEONFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/adler32_neon.c 32 $(CC) $(CFLAGS) $(INCLUDES) -c -o $@ $(SRCDIR)/armfeature.c 35 $(CC) $(SFLAGS) $(INCLUDES) -c -o $@ $(SRCDIR)/armfeature.c 38 $(CC) $(CFLAGS) $(NEONFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/chunkset_neon.c 41 $(CC) $(SFLAGS) $(NEONFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/chunkset_neon.c 44 $(CC) $(CFLAGS) $(ACLEFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_acle.c 47 $(CC) $(SFLAGS) $(ACLEFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_acle.c 50 $(CC) $(CFLAGS) $(NEONFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/slide_neon.c [all …]
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