1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple thumbv8m.base-none-eabi -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s 3--- | 4 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 5 target triple = "thumbv8m.base-none-none-eabi" 6 7 define i32 @test_subrr(i32 %a, i32 %b) { ret i32 %a } 8 define i32 @test_subrr_c(i32 %a, i32 %b) { ret i32 %a } 9 define i32 @test_subri3(i32 %a) { ret i32 %a } 10 define i32 @test_subri8(i32 %a) { ret i32 %a } 11 define i32 @test_addrr(i32 %a) { ret i32 %a } 12 define i32 @test_addri3(i32 %a) { ret i32 %a } 13 define i32 @test_addri8(i32 %a) { ret i32 %a } 14 15... 16--- 17name: test_subrr 18liveins: 19 - { reg: '$r0', virtual-reg: '%1' } 20 - { reg: '$r1', virtual-reg: '%2' } 21body: | 22 ; CHECK-LABEL: name: test_subrr 23 ; CHECK: bb.0: 24 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 25 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 26 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 27 ; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 28 ; CHECK: tBcc %bb.2, 8 /* CC::hi */, $cpsr 29 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 30 ; CHECK: bb.1: 31 ; CHECK: $r0 = COPY %2 32 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 33 ; CHECK: bb.2: 34 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 35 ; CHECK: $r0 = COPY %3 36 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 37 bb.0: 38 successors: %bb.2(0x40000000), %bb.1(0x40000000) 39 liveins: $r0, $r1 40 41 %2:tgpr = COPY $r1 42 %1:tgpr = COPY $r0 43 %0:tgpr, $cpsr = tSUBrr %2, %1, 14, $noreg 44 tCMPr %1, %2, 14, $noreg, implicit-def $cpsr 45 tBcc %bb.2, 3, $cpsr 46 tB %bb.1, 14, $noreg 47 48 bb.1: 49 $r0 = COPY %0 50 tBX_RET 14, $noreg, implicit $r0 51 52 bb.2: 53 %3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 54 $r0 = COPY %3 55 tBX_RET 14, $noreg, implicit $r0 56 57... 58--- 59name: test_subrr_c 60liveins: 61 - { reg: '$r0', virtual-reg: '%1' } 62 - { reg: '$r1', virtual-reg: '%2' } 63body: | 64 ; CHECK-LABEL: name: test_subrr_c 65 ; CHECK: bb.0: 66 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 67 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 68 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 69 ; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg 70 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr 71 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 72 ; CHECK: bb.1: 73 ; CHECK: $r0 = COPY %2 74 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 75 ; CHECK: bb.2: 76 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 77 ; CHECK: $r0 = COPY %3 78 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 79 bb.0: 80 successors: %bb.2(0x40000000), %bb.1(0x40000000) 81 liveins: $r0, $r1 82 83 %2:tgpr = COPY $r1 84 %1:tgpr = COPY $r0 85 %0:tgpr, $cpsr = tSUBrr %1, %2, 14, $noreg 86 tCMPr %1, %2, 14, $noreg, implicit-def $cpsr 87 tBcc %bb.2, 3, $cpsr 88 tB %bb.1, 14, $noreg 89 90 bb.1: 91 $r0 = COPY %0 92 tBX_RET 14, $noreg, implicit $r0 93 94 bb.2: 95 %3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 96 $r0 = COPY %3 97 tBX_RET 14, $noreg, implicit $r0 98 99... 100--- 101name: test_subri3 102liveins: 103 - { reg: '$r0', virtual-reg: '%1' } 104body: | 105 ; CHECK-LABEL: name: test_subri3 106 ; CHECK: bb.0: 107 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 108 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 109 ; CHECK: %1:tgpr, $cpsr = tSUBi3 [[COPY]], 1, 14 /* CC::al */, $noreg 110 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr 111 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 112 ; CHECK: bb.1: 113 ; CHECK: $r0 = COPY %1 114 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 115 ; CHECK: bb.2: 116 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 117 ; CHECK: $r0 = COPY %2 118 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 119 bb.0: 120 successors: %bb.2(0x40000000), %bb.1(0x40000000) 121 liveins: $r0 122 123 %1:tgpr = COPY $r0 124 %0:tgpr, $cpsr = tSUBi3 %1, 1, 14, $noreg 125 tCMPi8 %1, 1, 14, $noreg, implicit-def $cpsr 126 tBcc %bb.2, 3, $cpsr 127 tB %bb.1, 14, $noreg 128 129 bb.1: 130 $r0 = COPY %0 131 tBX_RET 14, $noreg, implicit $r0 132 133 bb.2: 134 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 135 $r0 = COPY %2 136 tBX_RET 14, $noreg, implicit $r0 137 138... 139--- 140name: test_subri8 141liveins: 142 - { reg: '$r0', virtual-reg: '%1' } 143body: | 144 ; CHECK-LABEL: name: test_subri8 145 ; CHECK: bb.0: 146 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 147 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 148 ; CHECK: %1:tgpr, $cpsr = tSUBi8 [[COPY]], 1, 14 /* CC::al */, $noreg 149 ; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr 150 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 151 ; CHECK: bb.1: 152 ; CHECK: $r0 = COPY %1 153 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 154 ; CHECK: bb.2: 155 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 156 ; CHECK: $r0 = COPY %2 157 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 158 bb.0: 159 successors: %bb.2(0x40000000), %bb.1(0x40000000) 160 liveins: $r0 161 162 %1:tgpr = COPY $r0 163 %0:tgpr, $cpsr = tSUBi8 %1, 1, 14, $noreg 164 tCMPi8 %1, 1, 14, $noreg, implicit-def $cpsr 165 tBcc %bb.2, 3, $cpsr 166 tB %bb.1, 14, $noreg 167 168 bb.1: 169 $r0 = COPY %0 170 tBX_RET 14, $noreg, implicit $r0 171 172 bb.2: 173 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 174 $r0 = COPY %2 175 tBX_RET 14, $noreg, implicit $r0 176 177... 178--- 179name: test_addrr 180liveins: 181 - { reg: '$r0', virtual-reg: '%1' } 182 - { reg: '$r1', virtual-reg: '%2' } 183body: | 184 ; CHECK-LABEL: name: test_addrr 185 ; CHECK: bb.0: 186 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 187 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1 188 ; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0 189 ; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 190 ; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr 191 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 192 ; CHECK: bb.1: 193 ; CHECK: $r0 = COPY %2 194 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 195 ; CHECK: bb.2: 196 ; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 197 ; CHECK: $r0 = COPY %3 198 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 199 bb.0: 200 successors: %bb.2(0x40000000), %bb.1(0x40000000) 201 liveins: $r0, $r1 202 203 %2:tgpr = COPY $r1 204 %1:tgpr = COPY $r0 205 %0:tgpr, $cpsr = tADDrr %2, %1, 14, $noreg 206 tCMPr %0, %2, 14, $noreg, implicit-def $cpsr 207 tBcc %bb.2, 3, $cpsr 208 tB %bb.1, 14, $noreg 209 210 bb.1: 211 $r0 = COPY %0 212 tBX_RET 14, $noreg, implicit $r0 213 214 bb.2: 215 %3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 216 $r0 = COPY %3 217 tBX_RET 14, $noreg, implicit $r0 218 219... 220--- 221name: test_addri3 222liveins: 223 - { reg: '$r0', virtual-reg: '%1' } 224body: | 225 ; CHECK-LABEL: name: test_addri3 226 ; CHECK: bb.0: 227 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 228 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 229 ; CHECK: %0:tgpr, $cpsr = tADDi3 [[COPY]], 1, 14 /* CC::al */, $noreg 230 ; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr 231 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 232 ; CHECK: bb.1: 233 ; CHECK: $r0 = COPY [[COPY]] 234 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 235 ; CHECK: bb.2: 236 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 237 ; CHECK: $r0 = COPY %2 238 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 239 bb.0: 240 successors: %bb.2(0x40000000), %bb.1(0x40000000) 241 liveins: $r0 242 243 %0:tgpr = COPY $r0 244 %1:tgpr, $cpsr = tADDi3 %0, 1, 14, $noreg 245 tCMPr %1, %0, 14, $noreg, implicit-def $cpsr 246 tBcc %bb.2, 3, $cpsr 247 tB %bb.1, 14, $noreg 248 249 bb.1: 250 $r0 = COPY %0 251 tBX_RET 14, $noreg, implicit $r0 252 253 bb.2: 254 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 255 $r0 = COPY %2 256 tBX_RET 14, $noreg, implicit $r0 257 258... 259--- 260name: test_addri8 261liveins: 262 - { reg: '$r0', virtual-reg: '%1' } 263body: | 264 ; CHECK-LABEL: name: test_addri8 265 ; CHECK: bb.0: 266 ; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000) 267 ; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 268 ; CHECK: %0:tgpr, $cpsr = tADDi8 [[COPY]], 10, 14 /* CC::al */, $noreg 269 ; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr 270 ; CHECK: tB %bb.1, 14 /* CC::al */, $noreg 271 ; CHECK: bb.1: 272 ; CHECK: $r0 = COPY [[COPY]] 273 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 274 ; CHECK: bb.2: 275 ; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 276 ; CHECK: $r0 = COPY %2 277 ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0 278 bb.0: 279 successors: %bb.2(0x40000000), %bb.1(0x40000000) 280 liveins: $r0 281 282 %0:tgpr = COPY $r0 283 %1:tgpr, $cpsr = tADDi8 %0, 10, 14, $noreg 284 tCMPr %1, %0, 14, $noreg, implicit-def $cpsr 285 tBcc %bb.2, 3, $cpsr 286 tB %bb.1, 14, $noreg 287 288 bb.1: 289 $r0 = COPY %0 290 tBX_RET 14, $noreg, implicit $r0 291 292 bb.2: 293 %2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg 294 $r0 = COPY %2 295 tBX_RET 14, $noreg, implicit $r0 296 297... 298