| /external/llvm-project/llvm/unittests/Target/AArch64/ |
| D | InstSizes.cpp | 30 std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) { in createInstrInfo()
34 return std::make_unique<AArch64InstrInfo>(ST); in createInstrInfo()
42 LLVMTargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet, in runChecks()
44 std::function<void(AArch64InstrInfo &, MachineFunction &)> Checks) { in runChecks() argument
85 std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get()); in TEST()
87 auto isAuthInst = [](AArch64InstrInfo &II, MachineFunction &MF) { in TEST()
117 std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get()); in TEST()
121 [](AArch64InstrInfo &II, MachineFunction &MF) { in TEST()
131 std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get()); in TEST()
136 [](AArch64InstrInfo &II, MachineFunction &MF) { in TEST()
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| D | DecomposeStackOffsetTest.cpp | 23 AArch64InstrInfo::decomposeStackOffsetForFrameOffsets(A + B + C, ByteSized, PLSized, in TEST()
32 AArch64InstrInfo::decomposeStackOffsetForFrameOffsets(C + D, ByteSized, PLSized, VLSized); in TEST()
39 AArch64InstrInfo::decomposeStackOffsetForFrameOffsets(E + F, ByteSized, PLSized, VLSized); in TEST()
49 AArch64InstrInfo::decomposeStackOffsetForFrameOffsets(G + H, ByteSized, PLSized, VLSized); in TEST()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSubtargetInfo.inc | 19388 const AArch64InstrInfo *TII =
19389 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
19395 if (AArch64InstrInfo::hasShiftedReg(*MI))
19400 if (AArch64InstrInfo::hasShiftedReg(*MI))
19407 if (AArch64InstrInfo::hasExtendedReg(*MI))
19412 if (AArch64InstrInfo::hasExtendedReg(*MI))
19454 if (AArch64InstrInfo::isScaledAddr(*MI))
19459 if (AArch64InstrInfo::isExynosScaledAddr(*MI)
19461 AArch64InstrInfo::isScaledAddr(*MI)
19462 || AArch64InstrInfo::isExynosScaledAddr(*MI)
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64MacroFusion.cpp | 57 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticBccPair()
107 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticCbzPair()
241 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isCCSelectPair()
243 return !AArch64InstrInfo::hasExtendedReg(*FirstMI); in isCCSelectPair()
259 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isCCSelectPair()
262 return !AArch64InstrInfo::hasExtendedReg(*FirstMI); in isCCSelectPair()
275 if (AArch64InstrInfo::hasShiftedReg(SecondMI)) in isArithmeticLogicPair()
336 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticLogicPair()
364 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticLogicPair()
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| D | AArch64InstrInfo.cpp | 69 AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI) in AArch64InstrInfo() function in AArch64InstrInfo
76 unsigned AArch64InstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { in getInstSizeInBytes()
145 unsigned AArch64InstrInfo::getInstBundleLength(const MachineInstr &MI) const { in getInstBundleLength()
208 bool AArch64InstrInfo::isBranchOffsetInRange(unsigned BranchOp, in isBranchOffsetInRange()
217 AArch64InstrInfo::getBranchDestBlock(const MachineInstr &MI) const { in getBranchDestBlock()
238 bool AArch64InstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
356 bool AArch64InstrInfo::analyzeBranchPredicate(MachineBasicBlock &MBB, in analyzeBranchPredicate()
406 bool AArch64InstrInfo::reverseBranchCondition( in reverseBranchCondition()
447 unsigned AArch64InstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch()
482 void AArch64InstrInfo::instantiateCondBranch( in instantiateCondBranch()
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| D | AArch64BranchTargets.cpp | 110 const AArch64InstrInfo *TII = static_cast<const AArch64InstrInfo *>( in addBTI()
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| D | AArch64StorePairSuppress.cpp | 31 const AArch64InstrInfo *TII;
126 TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo()); in runOnMachineFunction()
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| D | AArch64InstrInfo.h | 38 class AArch64InstrInfo final : public AArch64GenInstrInfo {
43 explicit AArch64InstrInfo(const AArch64Subtarget &STI);
354 const AArch64InstrInfo *TII);
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| D | AArch64Schedule.td | 13 const AArch64InstrInfo *TII =
14 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
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| D | AArch64CondBrTuning.cpp | 48 const AArch64InstrInfo *TII;
291 TII = static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64MacroFusion.cpp | 57 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticBccPair()
107 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticCbzPair()
241 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isCCSelectPair()
243 return !AArch64InstrInfo::hasExtendedReg(*FirstMI); in isCCSelectPair()
259 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isCCSelectPair()
262 return !AArch64InstrInfo::hasExtendedReg(*FirstMI); in isCCSelectPair()
275 if (AArch64InstrInfo::hasShiftedReg(SecondMI)) in isArithmeticLogicPair()
336 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticLogicPair()
364 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticLogicPair()
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| D | AArch64InstrInfo.cpp | 69 AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI) in AArch64InstrInfo() function in AArch64InstrInfo
76 unsigned AArch64InstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { in getInstSizeInBytes()
179 bool AArch64InstrInfo::isBranchOffsetInRange(unsigned BranchOp, in isBranchOffsetInRange()
188 AArch64InstrInfo::getBranchDestBlock(const MachineInstr &MI) const { in getBranchDestBlock()
209 bool AArch64InstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
296 bool AArch64InstrInfo::reverseBranchCondition( in reverseBranchCondition()
337 unsigned AArch64InstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch()
372 void AArch64InstrInfo::instantiateCondBranch( in instantiateCondBranch()
389 unsigned AArch64InstrInfo::insertBranch( in insertBranch()
497 bool AArch64InstrInfo::canInsertSelect(const MachineBasicBlock &MBB, in canInsertSelect()
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| D | AArch64BranchTargets.cpp | 109 const AArch64InstrInfo *TII = static_cast<const AArch64InstrInfo *>( in addBTI()
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| D | AArch64StorePairSuppress.cpp | 31 const AArch64InstrInfo *TII;
126 TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo()); in runOnMachineFunction()
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| D | AArch64StackTaggingPreRA.cpp | 61 const AArch64InstrInfo *TII;
204 TII = static_cast<const AArch64InstrInfo *>(MF->getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| D | AArch64InstrInfo.h | 38 class AArch64InstrInfo final : public AArch64GenInstrInfo {
43 explicit AArch64InstrInfo(const AArch64Subtarget &STI);
324 const AArch64InstrInfo *TII);
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| D | AArch64Schedule.td | 13 const AArch64InstrInfo *TII =
14 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 35 AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI) in AArch64InstrInfo() function in AArch64InstrInfo
41 unsigned AArch64InstrInfo::GetInstSizeInBytes(const MachineInstr &MI) const { in GetInstSizeInBytes()
96 bool AArch64InstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
183 bool AArch64InstrInfo::ReverseBranchCondition( in ReverseBranchCondition()
224 unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { in RemoveBranch()
249 void AArch64InstrInfo::instantiateCondBranch( in instantiateCondBranch()
266 unsigned AArch64InstrInfo::InsertBranch(MachineBasicBlock &MBB, in InsertBranch()
366 bool AArch64InstrInfo::canInsertSelect( in canInsertSelect()
407 void AArch64InstrInfo::insertSelect(MachineBasicBlock &MBB, in insertSelect()
551 bool AArch64InstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const { in isAsCheapAsAMove()
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| D | AArch64StorePairSuppress.cpp | 30 const AArch64InstrInfo *TII;
122 TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo()); in runOnMachineFunction()
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| D | AArch64InstrInfo.h | 30 class AArch64InstrInfo : public AArch64GenInstrInfo {
35 explicit AArch64InstrInfo(const AArch64Subtarget &STI);
230 const AArch64InstrInfo *TII);
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| D | AArch64Subtarget.h | 107 AArch64InstrInfo InstrInfo;
145 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| D | AArch64RegisterInfo.cpp | 333 const AArch64InstrInfo *TII = in materializeFrameBaseRegister()
356 const AArch64InstrInfo *TII = in resolveFrameIndex()
371 const AArch64InstrInfo *TII = in eliminateFrameIndex()
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| D | AArch64.td | 130 include "AArch64InstrInfo.td"
132 def AArch64InstrInfo : InstrInfo;
315 let InstructionSet = AArch64InstrInfo;
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| D | AArch64Schedule.td | 14 const AArch64InstrInfo *TII =
15 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
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| /external/llvm/test/CodeGen/AArch64/ |
| D | optimize-cond-branch.ll | 4 ; AArch64InstrInfo::optimizeCondBranch() optimizes the
|