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Searched refs:AddReg (Results 1 – 8 of 8) sorted by relevance

/external/google-breakpad/src/client/mac/handler/
Dminidump_generator.cc650 #define AddReg(a) context_ptr->a = static_cast<__typeof__(context_ptr->a)>( \ in WriteContextPPC() macro
656 AddReg(srr0); in WriteContextPPC()
657 AddReg(cr); in WriteContextPPC()
658 AddReg(xer); in WriteContextPPC()
659 AddReg(ctr); in WriteContextPPC()
660 AddReg(lr); in WriteContextPPC()
661 AddReg(vrsave); in WriteContextPPC()
695 AddReg(mq); in WriteContextPPC()
696 #undef AddReg in WriteContextPPC()
716 #define AddReg(a) context_ptr->a = static_cast<__typeof__(context_ptr->a)>( \ in WriteContextPPC64() macro
[all …]
/external/llvm/lib/CodeGen/AsmPrinter/
DDwarfExpression.cpp25 void DwarfExpression::AddReg(int DwarfReg, const char *Comment) { in AddReg() function in DwarfExpression
96 AddReg(Reg); in AddMachineRegPiece()
110 AddReg(Reg, "super-register"); in AddMachineRegPiece()
152 AddReg(Reg, "sub-register"); in AddMachineRegPiece()
DDwarfExpression.h51 void AddReg(int DwarfReg, const char *Comment = nullptr);
DAsmPrinterDwarf.cpp205 Expr.AddReg(Reg); in EmitDwarfRegOp()
/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/
DCSETest.cpp32 Register AddReg = MRI->createGenericVirtualRegister(s16); in TEST_F() local
34 CSEB.buildInstr(TargetOpcode::G_ADD, {AddReg}, {MIBInput, MIBInput}); in TEST_F()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4775 unsigned AddReg = emitAdd_ri_(VT, Src0Reg, /*IsKill=*/false, Pow2MinusOne); in selectSDiv() local
4776 if (!AddReg) in selectSDiv()
4793 fastEmitInst_rri(SelectOpc, RC, AddReg, /*IsKill=*/true, Src0Reg, in selectSDiv()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4947 unsigned AddReg = emitAdd_ri_(VT, Src0Reg, /*IsKill=*/false, Pow2MinusOne); in selectSDiv() local
4948 if (!AddReg) in selectSDiv()
4965 fastEmitInst_rri(SelectOpc, RC, AddReg, /*IsKill=*/true, Src0Reg, in selectSDiv()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4954 unsigned AddReg = emitAdd_ri_(VT, Src0Reg, /*IsKill=*/false, Pow2MinusOne); in selectSDiv() local
4955 if (!AddReg) in selectSDiv()
4972 fastEmitInst_rri(SelectOpc, RC, AddReg, /*IsKill=*/true, Src0Reg, in selectSDiv()