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Searched refs:BL1_RW_LIMIT (Results 1 – 18 of 18) sorted by relevance

/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dplatform_def.h102 #define BL1_RW_LIMIT (BL1_RW_BASE + 0x12000) macro
104 #define BL11_RW_BASE BL1_RW_LIMIT
114 #define BL2_RW_BASE BL1_RW_LIMIT
120 #define BL2_RW_BASE BL1_RW_LIMIT
124 #define BL2_BASE (BL1_RW_LIMIT + PAGE_SIZE)
Dsr_def.h457 #define BCM_ELOG_BL2_BASE BL1_RW_LIMIT
/external/arm-trusted-firmware/bl1/
Dbl1.ld.S24 RAM (rwx): ORIGIN = BL1_RW_BASE, LENGTH = BL1_RW_LIMIT - BL1_RW_BASE
148 ASSERT(. <= BL1_RW_LIMIT, "BL1's RW section has exceeded its limit.")
/external/arm-trusted-firmware/plat/rpi/rpi3/include/
Dplatform_def.h171 #define BL1_RW_BASE (BL1_RW_LIMIT - PLAT_MAX_BL1_RW_SIZE)
172 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/external/arm-trusted-firmware/plat/qemu/qemu/include/
Dplatform_def.h126 #define BL1_RW_BASE (BL1_RW_LIMIT - 0x12000)
127 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/external/arm-trusted-firmware/plat/qemu/qemu_sbsa/include/
Dplatform_def.h118 #define BL1_RW_BASE (BL1_RW_LIMIT - BL1_SIZE)
119 #define BL1_RW_LIMIT (BL_RAM_BASE + BL_RAM_SIZE) macro
/external/arm-trusted-firmware/plat/hisilicon/poplar/include/
Dpoplar_layout.h122 #define BL1_RW_LIMIT (BL1_RW_BASE + BL1_RW_SIZE) macro
/external/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dhikey_layout.h42 #define BL1_RW_LIMIT (0xF9898000) macro
/external/arm-trusted-firmware/plat/hisilicon/hikey960/include/
Dplatform_def.h56 #define BL1_RW_LIMIT (0x1B000000) macro
/external/arm-trusted-firmware/plat/hisilicon/hikey960/aarch64/
Dhikey960_common.c30 BL1_RW_LIMIT - BL1_RW_BASE, \
/external/arm-trusted-firmware/include/plat/marvell/armada/a3k/common/
Dmarvell_def.h151 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
/external/arm-trusted-firmware/include/plat/marvell/armada/a8k/common/
Dmarvell_def.h182 #define BL1_RW_LIMIT (MARVELL_BL_RAM_BASE + MARVELL_BL_RAM_SIZE) macro
/external/arm-trusted-firmware/plat/layerscape/board/ls1043/include/
Dplatform_def.h129 #define BL1_RW_LIMIT LS_SRAM_LIMIT macro
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h249 BL1_RW_LIMIT - BL1_RW_BASE, \
392 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/external/arm-trusted-firmware/plat/intel/soc/common/include/
Dplatform_def.h123 #define BL1_RW_LIMIT (0xffe1ffff) macro
/external/arm-trusted-firmware/plat/arm/board/a5ds/include/
Dplatform_def.h224 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/external/arm-trusted-firmware/plat/arm/board/fvp_ve/include/
Dplatform_def.h207 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \ macro
/external/arm-trusted-firmware/docs/getting_started/
Dporting-guide.rst194 - **#define : BL1_RW_LIMIT**