Searched refs:BRW_OPCODE_MAD (Results 1 – 25 of 26) sorted by relevance
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_cse.cpp | 73 case BRW_OPCODE_MAD: in is_expression()
103 if (a->opcode == BRW_OPCODE_MAD) { in operands_match()
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| D | brw_fs_saturate_propagation.cpp | 93 } else if (scan_inst->opcode == BRW_OPCODE_MAD) { in opt_saturate_propagation_local()
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| D | brw_fs_cse.cpp | 72 case BRW_OPCODE_MAD: in is_expression()
122 if (a->opcode == BRW_OPCODE_MAD) { in operands_match()
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| D | brw_fs_combine_constants.cpp | 81 case BRW_OPCODE_MAD: in must_promote_imm()
382 inst->opcode == BRW_OPCODE_MAD && in opt_combine_constants()
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| D | brw_shader.cpp | 969 case BRW_OPCODE_MAD: in can_do_saturate()
1020 case BRW_OPCODE_MAD: in can_do_cmod()
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| D | brw_ir_performance.cpp | 147 if ((inst->opcode == BRW_OPCODE_MUL || inst->opcode == BRW_OPCODE_MAD) && in instruction_info()
170 if ((inst->opcode == BRW_OPCODE_MUL || inst->opcode == BRW_OPCODE_MAD) && in instruction_info()
430 case BRW_OPCODE_MAD: in instruction_desc()
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| D | brw_vec4_builder.h | 295 case BRW_OPCODE_MAD: in emit()
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| D | brw_fs_lower_regioning.cpp | 144 inst->opcode == BRW_OPCODE_MAD && in has_invalid_src_region()
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| D | test_vec4_cmod_propagation.cpp | 700 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
741 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
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| D | test_fs_saturate_propagation.cpp | 387 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
433 EXPECT_EQ(BRW_OPCODE_MAD, instruction(block0, 0)->opcode); in TEST_F()
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| D | brw_ir_fs.h | 563 (inst->opcode == BRW_OPCODE_MAD && in has_dst_aligned_region_restriction()
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| D | brw_eu_defines.h | 278 BRW_OPCODE_MAD, /**< Gen6+ */ enumerator
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| D | brw_fs_builder.h | 326 case BRW_OPCODE_MAD: in emit()
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| D | brw_eu.cpp | 692 { BRW_OPCODE_MAD, 91, "mad", 3, 1, GEN_GE(GEN6) },
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| D | brw_fs_copy_propagation.cpp | 891 case BRW_OPCODE_MAD: in try_constant_propagate()
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| D | brw_schedule_instructions.cpp | 159 case BRW_OPCODE_MAD: in set_latency_gen7()
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| D | brw_fs.cpp | 448 opcode == BRW_OPCODE_MAD)) { in can_do_source_mods()
450 const unsigned min_type_sz = opcode == BRW_OPCODE_MAD ? in can_do_source_mods()
2833 case BRW_OPCODE_MAD: in opt_algebraic()
6543 case BRW_OPCODE_MAD: in get_lowered_simd_width()
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| D | brw_vec4_generator.cpp | 1554 case BRW_OPCODE_MAD: in generate_code()
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| D | brw_vec4.cpp | 2518 if (inst->opcode != BRW_OPCODE_MAD) in lower_64bit_mad_to_mul_add()
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| D | brw_fs_generator.cpp | 2038 case BRW_OPCODE_MAD: in generate_code()
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| /external/igt-gpu-tools/assembler/ |
| D | lex.l | 102 "mad" { yylval.integer = BRW_OPCODE_MAD; return MAD; }
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| D | brw_defines.h | 703 BRW_OPCODE_MAD = 91, enumerator
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| D | brw_disasm.c | 49 [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 },
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| /external/mesa3d/src/intel/tools/ |
| D | i965_lex.l | 97 mad { yylval.integer = BRW_OPCODE_MAD; return MAD; }
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| D | i965_gram.y | 257 case BRW_OPCODE_MAD: in i965_asm_ternary_instruction()
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