Searched refs:BRW_OPCODE_SHR (Results 1 – 16 of 16) sorted by relevance
| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu.cpp | 609 { BRW_OPCODE_SHR, 8, "shr", 2, 1, GEN_LT(GEN12) },
610 { BRW_OPCODE_SHR, 104, "shr", 2, 1, GEN_GE(GEN12) },
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| D | brw_vec4_cse.cpp | 58 case BRW_OPCODE_SHR: in is_expression()
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| D | brw_shader.cpp | 981 case BRW_OPCODE_SHR: in can_do_saturate()
1033 case BRW_OPCODE_SHR: in can_do_cmod()
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| D | brw_vec4_copy_propagation.cpp | 197 case BRW_OPCODE_SHR: in try_constant_propagate()
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| D | brw_fs_cse.cpp | 57 case BRW_OPCODE_SHR: in is_expression()
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| D | brw_eu_defines.h | 210 BRW_OPCODE_SHR, enumerator
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| D | brw_fs_copy_propagation.cpp | 759 case BRW_OPCODE_SHR: in try_constant_propagate()
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| D | brw_ir_performance.cpp | 301 case BRW_OPCODE_SHR: in instruction_desc()
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| D | brw_vec4_generator.cpp | 1587 case BRW_OPCODE_SHR: in generate_code()
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| D | brw_fs_generator.cpp | 2080 case BRW_OPCODE_SHR: in generate_code()
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| D | brw_fs.cpp | 6519 case BRW_OPCODE_SHR: in get_lowered_simd_width()
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| /external/igt-gpu-tools/assembler/ |
| D | lex.l | 127 "shr" { yylval.integer = BRW_OPCODE_SHR; return SHR; }
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| D | brw_defines.h | 643 BRW_OPCODE_SHR = 8, enumerator
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| D | brw_disasm.c | 64 [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 },
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| /external/mesa3d/src/intel/tools/ |
| D | i965_lex.l | 126 shr { yylval.integer = BRW_OPCODE_SHR; return SHR; }
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| D | i965_gram.y | 234 case BRW_OPCODE_SHR: in i965_asm_binary_instruction()
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