| /external/webrtc/modules/rtp_rtcp/source/ |
| D | rtp_format_vp8_test_helper.cc | 40 int Bit(uint8_t byte, int position) { in Bit() function
80 int x_bit = Bit(buffer[0], 7); in CheckHeader()
81 EXPECT_EQ(Bit(buffer[0], 6), 0); // Reserved. in CheckHeader()
82 EXPECT_EQ(Bit(buffer[0], 5), hdr_info_->nonReference ? 1 : 0); in CheckHeader()
83 EXPECT_EQ(Bit(buffer[0], 4), first ? 1 : 0); in CheckHeader()
108 int i_bit = Bit(buffer[1], 7); in CheckPictureID()
111 int two_byte_picture_id = Bit(buffer[*offset], 7); in CheckPictureID()
126 int l_bit = Bit(buffer[1], 6); in CheckTl0PicIdx()
142 int t_bit = Bit(buffer[1], 5); in CheckTIDAndKeyIdx()
143 int k_bit = Bit(buffer[1], 4); in CheckTIDAndKeyIdx()
[all …]
|
| /external/capstone/arch/X86/ |
| D | X86GenRegisterInfo.inc | 658 // GR8 Bit set.
668 // GR8_NOREX Bit set.
678 // VK1 Bit set.
688 // VK2 Bit set.
698 // VK4 Bit set.
708 // VK8 Bit set.
718 // VK1WM Bit set.
728 // VK2WM Bit set.
738 // VK4WM Bit set.
748 // VK8WM Bit set.
[all …]
|
| /external/capstone/arch/ARM/ |
| D | ARMGenRegisterInfo.inc | 1184 // SPR Bit set.
1194 // GPR Bit set.
1204 // GPRwithAPSR Bit set.
1214 // SPR_8 Bit set.
1224 // GPRnopc Bit set.
1234 // rGPR Bit set.
1244 // hGPR Bit set.
1254 // tGPR Bit set.
1264 // GPRnopc_and_hGPR Bit set.
1274 // hGPR_and_rGPR Bit set.
[all …]
|
| /external/llvm-project/llvm/tools/llvm-exegesis/lib/ |
| D | CodeTemplate.cpp | 70 StringRef getName(ExecutionMode Bit) { in getName() argument
71 assert(isEnumValue(Bit) && "Bit must be a power of two"); in getName()
72 switch (Bit) { in getName()
108 for (const auto Bit : getAllExecutionBits()) in getExecutionModeBits() local
109 if ((Execution & Bit) == Bit) in getExecutionModeBits()
110 Result.push_back(Bit); in getExecutionModeBits()
|
| /external/capstone/arch/Mips/ |
| D | MipsGenRegisterInfo.inc | 999 // OddSP Bit set.
1009 // CCR Bit set.
1019 // COP2 Bit set.
1029 // COP3 Bit set.
1039 // DSPR Bit set.
1049 // FGR32 Bit set.
1059 // FGRCC Bit set.
1069 // FGRH32 Bit set.
1079 // GPR32 Bit set.
1089 // HWRegs Bit set.
[all …]
|
| /external/capstone/arch/SystemZ/ |
| D | SystemZGenRegisterInfo.inc | 512 // GRX32Bit Bit set.
522 // VR32Bit Bit set.
532 // AR32Bit Bit set.
542 // FP32Bit Bit set.
552 // GR32Bit Bit set.
562 // GRH32Bit Bit set.
572 // ADDR32Bit Bit set.
582 // CCR Bit set.
592 // AnyRegBit Bit set.
602 // AnyRegBit_with_subreg_r32 Bit set.
[all …]
|
| /external/libchrome/base/strings/ |
| D | strcat_unittest.cc | 11 TEST(StrCat, 8Bit) {
20 TEST(StrCat, 16Bit) {
31 TEST(StrAppend, 8Bit) {
47 TEST(StrAppend, 16Bit) {
|
| /external/rust/crates/libfuzzer-sys/libfuzzer/ |
| D | FuzzerTracePC.h | 226 unsigned Bit = 0; in CounterToFeature() local
227 /**/ if (Counter >= 128) Bit = 7; in CounterToFeature()
228 else if (Counter >= 32) Bit = 6; in CounterToFeature()
229 else if (Counter >= 16) Bit = 5; in CounterToFeature()
230 else if (Counter >= 8) Bit = 4; in CounterToFeature()
231 else if (Counter >= 4) Bit = 3; in CounterToFeature()
232 else if (Counter >= 3) Bit = 2; in CounterToFeature()
233 else if (Counter >= 2) Bit = 1; in CounterToFeature()
234 return Bit; in CounterToFeature()
|
| /external/llvm-project/compiler-rt/lib/fuzzer/ |
| D | FuzzerTracePC.h | 226 unsigned Bit = 0; in CounterToFeature() local
227 /**/ if (Counter >= 128) Bit = 7; in CounterToFeature()
228 else if (Counter >= 32) Bit = 6; in CounterToFeature()
229 else if (Counter >= 16) Bit = 5; in CounterToFeature()
230 else if (Counter >= 8) Bit = 4; in CounterToFeature()
231 else if (Counter >= 4) Bit = 3; in CounterToFeature()
232 else if (Counter >= 3) Bit = 2; in CounterToFeature()
233 else if (Counter >= 2) Bit = 1; in CounterToFeature()
234 return Bit; in CounterToFeature()
|
| /external/capstone/arch/PowerPC/ |
| D | PPCGenRegisterInfo.inc | 733 // GPRC Bit set.
743 // GPRC_NOR0 Bit set.
753 // GPRC_and_GPRC_NOR0 Bit set.
763 // CRBITRC Bit set.
773 // F4RC Bit set.
783 // CRRC Bit set.
793 // CARRYRC Bit set.
803 // CTRRC Bit set.
813 // VRSAVERC Bit set.
823 // VSFRC Bit set.
[all …]
|
| /external/arm-trusted-firmware/docs/perf/ |
| D | performance-monitoring-unit.rst | 78 - Bit 31.
83 - Bit 29.
90 - Bit 27.
96 - Bit 24.
103 - Bit 26.
126 - Bit 31.
133 - Bit 5.
143 - Bit 0.
|
| /external/scudo/standalone/ |
| D | size_class_map.h | 154 for (u8 Bit = 0; Bit != 64; ++Bit) { in LSBTable() local
155 if (Config::Classes[I] & (1 << Bit)) { in LSBTable()
156 Tab[I] = Bit; in LSBTable()
157 if (Bit < Min) in LSBTable()
158 Min = Bit; in LSBTable()
159 if (Bit > Max) in LSBTable()
160 Max = Bit; in LSBTable()
|
| /external/capstone/arch/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 1069 // FPR8 Bit set.
1079 // FPR16 Bit set.
1089 // GPR32all Bit set.
1099 // FPR32 Bit set.
1109 // GPR32 Bit set.
1119 // GPR32sp Bit set.
1129 // GPR32common Bit set.
1139 // CCR Bit set.
1149 // GPR32sponly Bit set.
1159 // GPR64all Bit set.
[all …]
|
| /external/capstone/arch/Sparc/ |
| D | SparcGenRegisterInfo.inc | 365 // FCCRegs Bit set.
375 // FPRegs Bit set.
385 // IntRegs Bit set.
395 // DFPRegs Bit set.
405 // I64Regs Bit set.
415 // DFPRegs_with_sub_even Bit set.
425 // QFPRegs Bit set.
435 // QFPRegs_with_sub_even Bit set.
|
| /external/llvm-project/llvm/unittests/ADT/ |
| D | CoalescingBitVectorTest.cpp | 193 for (unsigned Bit : LHS) in simpleUnion() local
194 Union.test_and_set(Bit); in simpleUnion()
195 for (unsigned Bit : RHS) in simpleUnion() local
196 Union.test_and_set(Bit); in simpleUnion()
286 for (unsigned Bit : LHS) in simpleIntersection() local
287 if (RHS.test(Bit)) in simpleIntersection()
288 Intersection.set(Bit); in simpleIntersection()
364 for (unsigned Bit : LHS) in simpleIntersectionWithComplement() local
365 if (!RHS.test(Bit)) in simpleIntersectionWithComplement()
366 Intersection.set(Bit); in simpleIntersectionWithComplement()
|
| /external/clang/test/Parser/ |
| D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) in InterlockedBitTestAndSet() argument
8 mov eax, Bit in InterlockedBitTestAndSet()
|
| /external/llvm-project/clang/test/Parser/ |
| D | MicrosoftExtensionsInlineAsm.c | 5 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit) in InterlockedBitTestAndSet() argument
8 mov eax, Bit in InterlockedBitTestAndSet()
|
| /external/llvm-project/llvm/docs/PDB/ |
| D | HashTable.rst | 34 | Present Bit Vector |
36 | Deleted Bit Vector |
54 - **Present Bit Vector** - A serialized bit vector which contains information
60 - **Deleted Bit Vector** - A serialized bit vector which contains information
72 Present and Deleted Bit Vectors
|
| /external/llvm-project/llvm/test/tools/llvm-readobj/ELF/ |
| D | mips-reginfo.test | 25 ContentArray: [ 0xA, 0xB, 0xC, 0xD, ## Bit-mask of used general registers.
27 0x55, 0x66, 0x77, 0x88, ## Bit-mask of used co-processor registers (0).
28 0x99, 0xAA, 0xBB, 0xCC, ## Bit-mask of used co-processor registers (1).
29 0xDD, 0xEE, 0xFF, 0x1E, ## Bit-mask of used co-processor registers (2).
30 0x2E, 0x3E, 0x4E, 0x5E, ## Bit-mask of used co-processor registers (3).
|
| /external/llvm-project/llvm/lib/Frontend/OpenMP/ |
| D | OMPContext.cpp | 82 for (unsigned Bit : ActiveTraits.set_bits()) { in OMPContext()
83 TraitProperty Property = TraitProperty(Bit); in OMPContext()
130 for (unsigned Bit : VMI0.RequiredTraits.set_bits()) in isStrictSubset() local
131 if (!VMI1.RequiredTraits.test(Bit)) in isStrictSubset()
188 for (unsigned Bit : VMI.RequiredTraits.set_bits()) { in isVariantApplicableInContextHelper() local
189 TraitProperty Property = TraitProperty(Bit); in isVariantApplicableInContextHelper()
271 for (unsigned Bit : VMI.RequiredTraits.set_bits()) { in getVariantMatchScore() local
272 TraitProperty Property = TraitProperty(Bit); in getVariantMatchScore()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/TableGen/ |
| D | Record.h | 416 virtual Init *getBit(unsigned Bit) const = 0;
473 Init *getBit(unsigned Bit) const override { in getBit() argument
502 Init *getBit(unsigned Bit) const override { in getBit() argument
503 assert(Bit < 1 && "Bit index out of range!"); in getBit()
557 Init *getBit(unsigned Bit) const override { in getBit() argument
558 assert(Bit < NumBits && "Bit index out of range!"); in getBit()
559 return getTrailingObjects<Init *>()[Bit]; in getBit()
588 Init *getBit(unsigned Bit) const override { in getBit() argument
589 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
619 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
|
| /external/llvm/include/llvm/TableGen/ |
| D | Record.h | 366 virtual Init *getBit(unsigned Bit) const = 0;
441 Init *getBit(unsigned Bit) const override { in getBit() argument
468 Init *getBit(unsigned Bit) const override { in getBit() argument
469 assert(Bit < 1 && "Bit index out of range!"); in getBit()
528 Init *getBit(unsigned Bit) const override { in getBit() argument
529 assert(Bit < NumBits && "Bit index out of range!"); in getBit()
530 return getTrailingObjects<Init *>()[Bit]; in getBit()
567 Init *getBit(unsigned Bit) const override { in getBit() argument
568 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
605 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
|
| /external/llvm-project/llvm/include/llvm/TableGen/ |
| D | Record.h | 396 virtual Init *getBit(unsigned Bit) const = 0;
454 Init *getBit(unsigned Bit) const override { in getBit() argument
487 Init *getBit(unsigned Bit) const override { in getBit() argument
488 assert(Bit < 1 && "Bit index out of range!"); in getBit()
542 Init *getBit(unsigned Bit) const override { in getBit() argument
543 assert(Bit < NumBits && "Bit index out of range!"); in getBit()
544 return getTrailingObjects<Init *>()[Bit]; in getBit()
573 Init *getBit(unsigned Bit) const override { in getBit() argument
574 return BitInit::get((Value & (1ULL << Bit)) != 0); in getBit()
626 Init *getBit(unsigned Bit) const override { in getBit() argument
[all …]
|
| /external/capstone/arch/TMS320C64x/ |
| D | TMS320C64xGenRegisterInfo.inc | 235 // GPRegs Bit set.
245 // AFRegs Bit set.
255 // BFRegs Bit set.
265 // ControlRegs Bit set.
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCV.td | 82 "'Zbf' (Bit-Field 'B' Instructions)">;
85 "'Zbf' (Bit-Field 'B' Instructions)">;
110 "'Zbs' (Single-Bit 'B' Instructions)">;
113 "'Zbs' (Single-Bit 'B' Instructions)">;
139 "'B' (Bit Manipulation Instructions)",
151 "'B' (Bit Manipulation Instructions)">;
|