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Searched refs:BuildMI (Results 1 – 25 of 721) sorted by relevance

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/external/llvm-project/llvm/unittests/CodeGen/
DLexicalScopesTest.cpp129 BuildMI(*MBB1, MBB1->end(), OutermostLoc, BeanInst); in TEST_F()
130 BuildMI(*MBB2, MBB2->end(), OutermostLoc, BeanInst); in TEST_F()
131 BuildMI(*MBB3, MBB3->end(), OutermostLoc, BeanInst); in TEST_F()
132 BuildMI(*MBB4, MBB4->end(), OutermostLoc, BeanInst); in TEST_F()
176 BuildMI(*MBB1, MBB1->end(), InBlockLoc, BeanInst); in TEST_F()
177 BuildMI(*MBB2, MBB2->end(), InBlockLoc, BeanInst); in TEST_F()
178 BuildMI(*MBB3, MBB3->end(), InBlockLoc, BeanInst); in TEST_F()
179 BuildMI(*MBB4, MBB4->end(), InBlockLoc, BeanInst); in TEST_F()
211 BuildMI(*MBB1, MBB1->end(), InlinedLoc, BeanInst); in TEST_F()
212 BuildMI(*MBB2, MBB2->end(), InlinedLoc, BeanInst); in TEST_F()
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp775 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFOCRF8), TempReg); in emitPrologue()
779 BuildMI(MBB, MBBI, dl, MoveFromCondRegInst, TempReg); in emitPrologue()
789 BuildMI(MBB, MBBI, dl, StoreWordInst) in emitPrologue()
796 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg); in emitPrologue()
803 BuildMI(MBB, MBBI, dl, StoreInst) in emitPrologue()
808 BuildMI(MBB, MBBI, dl, StoreInst) in emitPrologue()
813 BuildMI(MBB, MBBI, dl, StoreInst) in emitPrologue()
820 BuildMI(MBB, StackUpdateLoc, dl, StoreInst) in emitPrologue()
828 BuildMI(MBB, MBBI, dl, StoreWordInst) in emitPrologue()
843 BuildMI(MBB, MBBI, dl, OrInst, BPReg) in emitPrologue()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/
DVEFrameLowering.cpp51 BuildMI(MBB, MBBI, dl, TII.get(VE::STSri)) in emitPrologueInsns()
55 BuildMI(MBB, MBBI, dl, TII.get(VE::STSri)) in emitPrologueInsns()
59 BuildMI(MBB, MBBI, dl, TII.get(VE::STSri)) in emitPrologueInsns()
63 BuildMI(MBB, MBBI, dl, TII.get(VE::STSri)) in emitPrologueInsns()
67 BuildMI(MBB, MBBI, dl, TII.get(VE::ORri), VE::SX9) in emitPrologueInsns()
89 BuildMI(MBB, MBBI, dl, TII.get(VE::ORri), VE::SX11) in emitEpilogueInsns()
92 BuildMI(MBB, MBBI, dl, TII.get(VE::LDSri), VE::SX16) in emitEpilogueInsns()
95 BuildMI(MBB, MBBI, dl, TII.get(VE::LDSri), VE::SX15) in emitEpilogueInsns()
98 BuildMI(MBB, MBBI, dl, TII.get(VE::LDSri), VE::SX10) in emitEpilogueInsns()
101 BuildMI(MBB, MBBI, dl, TII.get(VE::LDSri), VE::SX9) in emitEpilogueInsns()
[all …]
DVEInstrInfo.cpp94 BuildMI(BB, dl, TII.get(VE::BCRLrr)) in expandExtendStackPseudo()
105 BuildMI(BB, dl, TII.get(VE::LDSri), VE::SX61) in expandExtendStackPseudo()
108 BuildMI(BB, dl, TII.get(VE::ORri), VE::SX62) in expandExtendStackPseudo()
111 BuildMI(BB, dl, TII.get(VE::LEAzzi), VE::SX63) in expandExtendStackPseudo()
113 BuildMI(BB, dl, TII.get(VE::SHMri)) in expandExtendStackPseudo()
117 BuildMI(BB, dl, TII.get(VE::SHMri)) in expandExtendStackPseudo()
121 BuildMI(BB, dl, TII.get(VE::SHMri)) in expandExtendStackPseudo()
125 BuildMI(BB, dl, TII.get(VE::MONC)); in expandExtendStackPseudo()
127 BuildMI(BB, dl, TII.get(VE::ORri), VE::SX0) in expandExtendStackPseudo()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVExpandAtomicPseudoInsts.cpp233 BuildMI(LoopMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) in doAtomicBinOpExpansion()
239 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg) in doAtomicBinOpExpansion()
242 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
247 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in doAtomicBinOpExpansion()
250 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion()
267 BuildMI(MBB, DL, TII->get(RISCV::XOR), ScratchReg) in insertMaskedMerge()
270 BuildMI(MBB, DL, TII->get(RISCV::AND), ScratchReg) in insertMaskedMerge()
273 BuildMI(MBB, DL, TII->get(RISCV::XOR), DestReg) in insertMaskedMerge()
299 BuildMI(LoopMBB, DL, TII->get(getLRForRMW32(Ordering)), DestReg) in doMaskedAtomicBinOpExpansion()
305 BuildMI(LoopMBB, DL, TII->get(RISCV::ADDI), ScratchReg) in doMaskedAtomicBinOpExpansion()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp145 BuildMI(loop1MBB, DL, TII->get(LL), Scratch).addReg(Ptr).addImm(0); in expandAtomicCmpSwapSubword()
146 BuildMI(loop1MBB, DL, TII->get(Mips::AND), Scratch2) in expandAtomicCmpSwapSubword()
149 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwapSubword()
157 BuildMI(loop2MBB, DL, TII->get(Mips::AND), Scratch) in expandAtomicCmpSwapSubword()
160 BuildMI(loop2MBB, DL, TII->get(Mips::OR), Scratch) in expandAtomicCmpSwapSubword()
163 BuildMI(loop2MBB, DL, TII->get(SC), Scratch) in expandAtomicCmpSwapSubword()
167 BuildMI(loop2MBB, DL, TII->get(BEQ)) in expandAtomicCmpSwapSubword()
175 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest) in expandAtomicCmpSwapSubword()
179 BuildMI(sinkMBB, DL, TII->get(SEOp), Dest).addReg(Dest); in expandAtomicCmpSwapSubword()
183 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicCmpSwapSubword()
[all …]
DMipsBranchExpansion.cpp340 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch()
387 BuildMI(*MBB, Pos, DL, TII->get(JumpOp)).addReg(ATReg); in buildProperJumpMI()
456 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
459 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
480 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
485 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB); in expandToLongBranch()
487 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
502 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
505 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
517 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
[all …]
/external/llvm-project/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp145 BuildMI(loop1MBB, DL, TII->get(LL), Scratch).addReg(Ptr).addImm(0); in expandAtomicCmpSwapSubword()
146 BuildMI(loop1MBB, DL, TII->get(Mips::AND), Scratch2) in expandAtomicCmpSwapSubword()
149 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwapSubword()
157 BuildMI(loop2MBB, DL, TII->get(Mips::AND), Scratch) in expandAtomicCmpSwapSubword()
160 BuildMI(loop2MBB, DL, TII->get(Mips::OR), Scratch) in expandAtomicCmpSwapSubword()
163 BuildMI(loop2MBB, DL, TII->get(SC), Scratch) in expandAtomicCmpSwapSubword()
167 BuildMI(loop2MBB, DL, TII->get(BEQ)) in expandAtomicCmpSwapSubword()
175 BuildMI(sinkMBB, DL, TII->get(Mips::SRLV), Dest) in expandAtomicCmpSwapSubword()
179 BuildMI(sinkMBB, DL, TII->get(SEOp), Dest).addReg(Dest); in expandAtomicCmpSwapSubword()
183 BuildMI(sinkMBB, DL, TII->get(Mips::SLL), Dest) in expandAtomicCmpSwapSubword()
[all …]
DMipsBranchExpansion.cpp340 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch()
396 BuildMI(*MBB, Pos, DL, TII->get(JumpOp)).addReg(ATReg); in buildProperJumpMI()
465 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
468 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
489 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
494 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB); in expandToLongBranch()
496 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
511 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
514 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
526 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
[all …]
/external/llvm-project/llvm/lib/Target/VE/
DVEFrameLowering.cpp152 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
157 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
164 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
169 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
176 BuildMI(MBB, MBBI, DL, TII.get(VE::STrii)) in emitPrologueInsns()
200 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX17) in emitEpilogueInsns()
205 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX16) in emitEpilogueInsns()
209 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX15) in emitEpilogueInsns()
215 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX10) in emitEpilogueInsns()
219 BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX9) in emitEpilogueInsns()
[all …]
/external/llvm/lib/Target/Mips/
DMipsLongBranch.cpp225 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch()
298 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
300 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA) in expandToLongBranch()
319 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
322 .append(BuildMI(*MF, DL, TII->get(BalOp)).addMBB(BalTgtMBB)) in expandToLongBranch()
323 .append(BuildMI(*MF, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
330 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
332 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
337 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
341 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::JALR)) in expandToLongBranch()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVExpandPseudoInsts.cpp250 BuildMI(LoopMBB, DL, TII->get(getLRForRMW(Ordering, Width)), DestReg) in doAtomicBinOpExpansion()
256 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg) in doAtomicBinOpExpansion()
259 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
264 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in doAtomicBinOpExpansion()
267 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion()
284 BuildMI(MBB, DL, TII->get(RISCV::XOR), ScratchReg) in insertMaskedMerge()
287 BuildMI(MBB, DL, TII->get(RISCV::AND), ScratchReg) in insertMaskedMerge()
290 BuildMI(MBB, DL, TII->get(RISCV::XOR), DestReg) in insertMaskedMerge()
316 BuildMI(LoopMBB, DL, TII->get(getLRForRMW32(Ordering)), DestReg) in doMaskedAtomicBinOpExpansion()
322 BuildMI(LoopMBB, DL, TII->get(RISCV::ADDI), ScratchReg) in doMaskedAtomicBinOpExpansion()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRFrameLowering.cpp64 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue()
71 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr)) in emitPrologue()
80 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr)) in emitPrologue()
84 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
87 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
90 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
114 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
131 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitPrologue()
139 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
170 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in emitEpilogue()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp36 BuildMI(MBB, I, DL, get(BPF::MOV_rr), DestReg) in copyPhysReg()
39 BuildMI(MBB, I, DL, get(BPF::MOV_rr_32), DestReg) in copyPhysReg()
78 BuildMI(*BB, MI, dl, get(LdOpc)) in expandMEMCPY()
81 BuildMI(*BB, MI, dl, get(StOpc)) in expandMEMCPY()
92 BuildMI(*BB, MI, dl, get(BPF::LDW)) in expandMEMCPY()
94 BuildMI(*BB, MI, dl, get(BPF::STW)) in expandMEMCPY()
99 BuildMI(*BB, MI, dl, get(BPF::LDH)) in expandMEMCPY()
101 BuildMI(*BB, MI, dl, get(BPF::STH)) in expandMEMCPY()
106 BuildMI(*BB, MI, dl, get(BPF::LDB)) in expandMEMCPY()
108 BuildMI(*BB, MI, dl, get(BPF::STB)) in expandMEMCPY()
[all …]
/external/llvm-project/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp36 BuildMI(MBB, I, DL, get(BPF::MOV_rr), DestReg) in copyPhysReg()
39 BuildMI(MBB, I, DL, get(BPF::MOV_rr_32), DestReg) in copyPhysReg()
78 BuildMI(*BB, MI, dl, get(LdOpc)) in expandMEMCPY()
81 BuildMI(*BB, MI, dl, get(StOpc)) in expandMEMCPY()
92 BuildMI(*BB, MI, dl, get(BPF::LDW)) in expandMEMCPY()
94 BuildMI(*BB, MI, dl, get(BPF::STW)) in expandMEMCPY()
99 BuildMI(*BB, MI, dl, get(BPF::LDH)) in expandMEMCPY()
101 BuildMI(*BB, MI, dl, get(BPF::STH)) in expandMEMCPY()
106 BuildMI(*BB, MI, dl, get(BPF::LDB)) in expandMEMCPY()
108 BuildMI(*BB, MI, dl, get(BPF::STB)) in expandMEMCPY()
[all …]
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h242 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, in BuildMI() function
249 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, in BuildMI() function
258 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
274 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
284 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, in BuildMI() function
290 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
291 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg); in BuildMI()
294 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, in BuildMI() function
297 return BuildMI(BB, *I, DL, MCID, DestReg); in BuildMI()
303 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp386 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
390 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
395 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
399 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
404 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
408 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
412 BuildMI(*MI.getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
977 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); in emitPrologue()
980 BuildMI(MBB, MBBI, dl, TII.get(PPC::STW8)) in emitPrologue()
987 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg); in emitPrologue()
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86FrameLowering.cpp227 BuildMI(MBB, MBBI, DL, TII.get(X86::STACKALLOC_W_PROBING)).addImm(Offset); in emitSPUpdate()
244 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg) in emitSPUpdate()
247 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr) in emitSPUpdate()
261 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r)) in emitSPUpdate()
270 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax) in emitSPUpdate()
273 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax) in emitSPUpdate()
279 BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax), in emitSPUpdate()
282 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr), in emitSPUpdate()
300 BuildMI(MBB, MBBI, DL, TII.get(Opc)) in emitSPUpdate()
346 MI = addRegOffset(BuildMI(MBB, MBBI, DL, in BuildStackAdjustment()
[all …]
/external/llvm-project/llvm/lib/Target/AVR/
DAVRFrameLowering.cpp63 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue()
71 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr)) in emitPrologue()
75 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
78 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
104 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
121 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitPrologue()
129 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
146 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in restoreStatusRegister()
147 BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr)) in restoreStatusRegister()
[all …]
/external/llvm-project/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h326 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, in BuildMI() function
333 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, in BuildMI() function
342 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
358 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
368 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, in BuildMI() function
374 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
375 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg); in BuildMI()
378 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, in BuildMI() function
381 return BuildMI(BB, *I, DL, MCID, DestReg); in BuildMI()
387 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h316 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, in BuildMI() function
323 inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, in BuildMI() function
332 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
348 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
358 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I, in BuildMI() function
364 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
365 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg); in BuildMI()
368 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I, in BuildMI() function
371 return BuildMI(BB, *I, DL, MCID, DestReg); in BuildMI()
377 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp351 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
355 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
360 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
364 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
369 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
373 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
377 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
850 BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg); in emitPrologue()
853 BuildMI(MBB, MBBI, dl, TII.get(PPC::STW8)) in emitPrologue()
860 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg); in emitPrologue()
[all …]
/external/llvm/lib/Target/X86/
DX86FrameLowering.cpp272 BuildMI(MBB, MBBI, DL, TII.get(Opc), Reg) in emitSPUpdate()
277 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitSPUpdate()
296 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) in emitSPUpdate()
349 MI = addRegOffset(BuildMI(MBB, MBBI, DL, in BuildStackAdjustment()
358 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in BuildStackAdjustment()
420 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) in BuildCFI()
585 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false, in emitStackProbeInline()
588 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false, in emitStackProbeInline()
593 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX); in emitStackProbeInline()
598 BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg) in emitStackProbeInline()
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp153 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::SCRATCH_STORE_DWORD_SADDR)) in buildPrologSpill()
164 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::BUFFER_STORE_DWORD_OFFSET)) in buildPrologSpill()
186 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_ADD_U32), OffsetReg) in buildPrologSpill()
190 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::SCRATCH_STORE_DWORD_SADDR)) in buildPrologSpill()
202 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::V_MOV_B32_e32), OffsetReg) in buildPrologSpill()
205 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::BUFFER_STORE_DWORD_OFFEN)) in buildPrologSpill()
237 BuildMI(MBB, I, DebugLoc(), in buildEpilogReload()
250 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_ADD_U32), OffsetReg) in buildEpilogReload()
253 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::SCRATCH_LOAD_DWORD_SADDR), in buildEpilogReload()
265 BuildMI(MBB, I, DebugLoc(), in buildEpilogReload()
[all …]
/external/llvm/lib/Target/AMDGPU/
DSILowerControlFlow.cpp207 BuildMI(*From.getParent(), &From, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ)) in Skip()
225 BuildMI(&MBB, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ)) in skipIfDead()
231 BuildMI(*SkipBB, Insert, DL, TII->get(AMDGPU::EXP)) in skipIfDead()
243 BuildMI(*SkipBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM)); in skipIfDead()
254 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), Reg) in If()
257 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), Reg) in If()
264 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::SI_MASK_BRANCH)) in If()
277 BuildMI(MBB, MBB.getFirstNonPHI(), DL, in Else()
285 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_B64), Dst) in Else()
290 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC) in Else()
[all …]

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