| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | copy-eflags-liveinlists.mir | 88 CDQ implicit-def $eax, implicit-def $edx, implicit $eax
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| D | greedy_regalloc_bad_eviction_sequence.ll | 25 ; CHECK-NEXT: CDQ
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| /external/llvm-project/llvm/test/CodeGen/X86/GlobalISel/ |
| D | x86-select-sdiv.mir | 119 ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
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| D | x86_64-select-sdiv.mir | 122 ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
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| D | x86_64-select-srem.mir | 197 ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
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| D | x86-select-srem.mir | 200 ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrExtension.td | 24 // FIXME: CWD/CDQ/CQO shouldn't Def the A register, but the fast register
30 def CDQ : I<0x99, RawFrm, (outs), (ins),
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| D | X86InstructionSelector.cpp | 1546 {X86::IDIV32r, X86::CDQ, Copy, X86::EAX, S}, // SDiv in selectDivRem()
1547 {X86::IDIV32r, X86::CDQ, Copy, X86::EDX, S}, // SRem in selectDivRem()
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| D | X86ScheduleAtom.td | 597 def : InstRW<[AtomWrite01_4], (instrs CBW, CWD, CWDE, CDQ, CDQE, CQO,
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| D | X86SchedSandyBridge.td | 609 def: InstRW<[SBWriteResGroup4], (instrs CDQ, CQO)>;
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| D | X86FastISel.cpp | 1911 { X86::IDIV32r, X86::CDQ, Copy, X86::EAX, S }, // SDiv in X86SelectDivRem()
1912 { X86::IDIV32r, X86::CDQ, Copy, X86::EDX, S }, // SRem in X86SelectDivRem()
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| D | X86SchedBroadwell.td | 654 def: InstRW<[BWWriteResGroup6], (instrs CDQ, CQO)>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrExtension.td | 24 // FIXME: CWD/CDQ/CQO shouldn't Def the A register, but the fast register
30 def CDQ : I<0x99, RawFrm, (outs), (ins),
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| D | X86InstructionSelector.cpp | 1590 {X86::IDIV32r, X86::CDQ, Copy, X86::EAX, S}, // SDiv in selectDivRem()
1591 {X86::IDIV32r, X86::CDQ, Copy, X86::EDX, S}, // SRem in selectDivRem()
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| D | X86ScheduleAtom.td | 594 def : InstRW<[AtomWrite01_4], (instrs CBW, CWD, CWDE, CDQ, CDQE, CQO,
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| D | X86SchedSandyBridge.td | 606 def: InstRW<[SBWriteResGroup4], (instrs CDQ, CQO)>;
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| D | X86FastISel.cpp | 1895 { X86::IDIV32r, X86::CDQ, Copy, X86::EAX, S }, // SDiv in X86SelectDivRem()
1896 { X86::IDIV32r, X86::CDQ, Copy, X86::EDX, S }, // SRem in X86SelectDivRem()
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| D | X86SchedBroadwell.td | 651 def: InstRW<[BWWriteResGroup6], (instrs CDQ, CQO)>;
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| /external/llvm-project/llvm/test/DebugInfo/MIR/X86/ |
| D | dbg-call-site-spilled-arg-multiple-defs.mir | 116 CDQ implicit-def $eax, implicit-def $edx, implicit $eax, debug-location !18
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| D | dbgcall-site-interpretation.mir | 173 CDQ implicit-def $eax, implicit-def $edx, implicit $eax, debug-location !21
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| /external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| D | SnippetGeneratorTest.cpp | 248 const unsigned Opcode = X86::CDQ; in TEST_F()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrExtension.td | 26 def CDQ : I<0x99, RawFrm, (outs), (ins),
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| D | X86FastISel.cpp | 1816 { X86::IDIV32r, X86::CDQ, Copy, X86::EAX, S }, // SDiv in X86SelectDivRem()
1817 { X86::IDIV32r, X86::CDQ, Copy, X86::EDX, S }, // SRem in X86SelectDivRem()
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeX86_common.c | 183 #define CDQ 0x99 macro
1005 *inst = CDQ; in sljit_emit_op0()
1011 *inst = CDQ; in sljit_emit_op0()
1017 *inst = CDQ; in sljit_emit_op0()
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 424 #define CDQ CHOICE(cltd, cdq, cdq) macro
1153 #define CDQ cdq macro
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