1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4--- | 5 ; ModuleID = 'sdiv.ll' 6 source_filename = "sdiv.ll" 7 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 8 9 define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) { 10 %res = sdiv i8 %arg1, %arg2 11 ret i8 %res 12 } 13 14 define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) { 15 %res = sdiv i16 %arg1, %arg2 16 ret i16 %res 17 } 18 19 define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) { 20 %res = sdiv i32 %arg1, %arg2 21 ret i32 %res 22 } 23 24... 25--- 26name: test_sdiv_i8 27alignment: 16 28legalized: true 29regBankSelected: true 30tracksRegLiveness: true 31registers: 32 - { id: 0, class: gpr } 33 - { id: 1, class: gpr } 34 - { id: 2, class: gpr } 35 - { id: 3, class: gpr } 36 - { id: 4, class: gpr } 37body: | 38 bb.1 (%ir-block.0): 39 liveins: $edi, $esi 40 41 ; CHECK-LABEL: name: test_sdiv_i8 42 ; CHECK: liveins: $edi, $esi 43 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi 44 ; CHECK: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]] 45 ; CHECK: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit 46 ; CHECK: [[COPY3:%[0-9]+]]:gr32 = COPY $esi 47 ; CHECK: [[COPY4:%[0-9]+]]:gr32_abcd = COPY [[COPY3]] 48 ; CHECK: [[COPY5:%[0-9]+]]:gr8_abcd_l = COPY [[COPY4]].sub_8bit 49 ; CHECK: $ax = MOVSX16rr8 [[COPY2]] 50 ; CHECK: IDIV8r [[COPY5]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax 51 ; CHECK: [[COPY6:%[0-9]+]]:gr8 = COPY $al 52 ; CHECK: $al = COPY [[COPY6]] 53 ; CHECK: RET 0, implicit $al 54 %2:gpr(s32) = COPY $edi 55 %0:gpr(s8) = G_TRUNC %2(s32) 56 %3:gpr(s32) = COPY $esi 57 %1:gpr(s8) = G_TRUNC %3(s32) 58 %4:gpr(s8) = G_SDIV %0, %1 59 $al = COPY %4(s8) 60 RET 0, implicit $al 61 62... 63--- 64name: test_sdiv_i16 65alignment: 16 66legalized: true 67regBankSelected: true 68tracksRegLiveness: true 69registers: 70 - { id: 0, class: gpr } 71 - { id: 1, class: gpr } 72 - { id: 2, class: gpr } 73 - { id: 3, class: gpr } 74 - { id: 4, class: gpr } 75body: | 76 bb.1 (%ir-block.0): 77 liveins: $edi, $esi 78 79 ; CHECK-LABEL: name: test_sdiv_i16 80 ; CHECK: liveins: $edi, $esi 81 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi 82 ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 83 ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi 84 ; CHECK: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit 85 ; CHECK: $ax = COPY [[COPY1]] 86 ; CHECK: CWD implicit-def $ax, implicit-def $dx, implicit $ax 87 ; CHECK: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx 88 ; CHECK: [[COPY4:%[0-9]+]]:gr16 = COPY $ax 89 ; CHECK: $ax = COPY [[COPY4]] 90 ; CHECK: RET 0, implicit $ax 91 %2:gpr(s32) = COPY $edi 92 %0:gpr(s16) = G_TRUNC %2(s32) 93 %3:gpr(s32) = COPY $esi 94 %1:gpr(s16) = G_TRUNC %3(s32) 95 %4:gpr(s16) = G_SDIV %0, %1 96 $ax = COPY %4(s16) 97 RET 0, implicit $ax 98 99... 100--- 101name: test_sdiv_i32 102alignment: 16 103legalized: true 104regBankSelected: true 105tracksRegLiveness: true 106registers: 107 - { id: 0, class: gpr } 108 - { id: 1, class: gpr } 109 - { id: 2, class: gpr } 110body: | 111 bb.1 (%ir-block.0): 112 liveins: $edi, $esi 113 114 ; CHECK-LABEL: name: test_sdiv_i32 115 ; CHECK: liveins: $edi, $esi 116 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi 117 ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 118 ; CHECK: $eax = COPY [[COPY]] 119 ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax 120 ; CHECK: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx 121 ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $eax 122 ; CHECK: $eax = COPY [[COPY2]] 123 ; CHECK: RET 0, implicit $eax 124 %0:gpr(s32) = COPY $edi 125 %1:gpr(s32) = COPY $esi 126 %2:gpr(s32) = G_SDIV %0, %1 127 $eax = COPY %2(s32) 128 RET 0, implicit $eax 129 130... 131