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Searched refs:COND_A (Results 1 – 23 of 23) sorted by relevance

/external/llvm-project/llvm/lib/Target/X86/
DX86SchedPredicates.td64 // A predicate to check for COND_A and COND_BE CMOVs which have an extra uop
67 CheckImmOperand_s<3, "X86::COND_A">,
72 CheckImmOperand_s<7, "X86::COND_A">,
76 // A predicate to check for COND_A and COND_BE SETCCs which have an extra uop
79 CheckImmOperand_s<1, "X86::COND_A">,
84 CheckImmOperand_s<5, "X86::COND_A">,
DX86FlagsCopyLowering.cpp352 return X86::COND_A; in getCondFromFCMOV()
DX86InstrInfo.cpp2714 case X86::COND_BE: return X86::COND_A; in GetOppositeBranchCondition()
2715 case X86::COND_A: return X86::COND_BE; in GetOppositeBranchCondition()
2739 case X86::COND_B: return X86::COND_A; in getSwappedCondition()
2741 case X86::COND_A: return X86::COND_B; in getSwappedCondition()
2755 case CmpInst::FCMP_OGT: CC = X86::COND_A; break; in getX86ConditionCode()
2771 case CmpInst::ICMP_UGT: CC = X86::COND_A; break; in getX86ConditionCode()
4281 case X86::COND_A: case X86::COND_AE: in optimizeCompareInstr()
DX86ScheduleBdVer2.td482 SchedVar<MCSchedPredicate<CheckImmOperand_s<7, "X86::COND_A">>, [PdWriteCMOVm]>,
DX86FrameLowering.cpp2791 BuildMI(checkMBB, DL, TII.get(X86::JCC_1)).addMBB(&PrologueMBB).addImm(X86::COND_A); in adjustForSegmentedStacks()
DX86ISelLowering.cpp4923 case X86::COND_A: in isX86CCSigned()
4945 case ISD::SETUGT: return X86::COND_A; in TranslateIntegerX86CC()
5013 case ISD::SETGT: return X86::COND_A; in TranslateX86CC()
5043 case X86::COND_A: in hasFPCMov()
21972 case X86::COND_A: case X86::COND_AE: in EmitTest()
25166 SetCC = getSETCC(X86::COND_A, Comi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
25431 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
25458 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
25462 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
41362 if (CarryCC == X86::COND_A) { in combineCarryThroughADD()
[all …]
DX86ISelDAGToDAG.cpp2880 case X86::COND_A: case X86::COND_AE: in hasNoSignFlagUses()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86SchedPredicates.td64 // A predicate to check for COND_A and COND_BE CMOVs which have an extra uop
67 CheckImmOperand_s<3, "X86::COND_A">,
72 CheckImmOperand_s<7, "X86::COND_A">,
76 // A predicate to check for COND_A and COND_BE SETCCs which have an extra uop
79 CheckImmOperand_s<1, "X86::COND_A">,
84 CheckImmOperand_s<5, "X86::COND_A">,
DX86FlagsCopyLowering.cpp351 return X86::COND_A; in getCondFromFCMOV()
DX86InstrInfo.cpp2227 case X86::COND_BE: return X86::COND_A; in GetOppositeBranchCondition()
2228 case X86::COND_A: return X86::COND_BE; in GetOppositeBranchCondition()
2252 case X86::COND_B: return X86::COND_A; in getSwappedCondition()
2254 case X86::COND_A: return X86::COND_B; in getSwappedCondition()
2268 case CmpInst::FCMP_OGT: CC = X86::COND_A; break; in getX86ConditionCode()
2284 case CmpInst::ICMP_UGT: CC = X86::COND_A; break; in getX86ConditionCode()
3732 case X86::COND_A: case X86::COND_AE: in optimizeCompareInstr()
DX86ScheduleBdVer2.td482 SchedVar<MCSchedPredicate<CheckImmOperand_s<7, "X86::COND_A">>, [PdWriteCMOVm]>,
DX86FrameLowering.cpp2451 BuildMI(checkMBB, DL, TII.get(X86::JCC_1)).addMBB(&PrologueMBB).addImm(X86::COND_A); in adjustForSegmentedStacks()
DX86ISelLowering.cpp4818 case X86::COND_A: in isX86CCSigned()
4840 case ISD::SETUGT: return X86::COND_A; in TranslateIntegerX86CC()
4908 case ISD::SETGT: return X86::COND_A; in TranslateX86CC()
4938 case X86::COND_A: in hasFPCMov()
20717 case X86::COND_A: case X86::COND_AE: in EmitTest()
24021 SetCC = getSETCC(X86::COND_A, Comi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
24024 SetCC = getSETCC(X86::COND_A, InvComi, dl, DAG); in LowerINTRINSIC_WO_CHAIN()
24292 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
24319 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
24323 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
[all …]
DX86ISelDAGToDAG.cpp2782 case X86::COND_A: case X86::COND_AE: in hasNoSignFlagUses()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h83 COND_A = 7, enumerator
307 case X86::COND_A: in classifySecondCondCodeInMacroFusion()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h88 COND_A = 7, enumerator
312 case X86::COND_A: in classifySecondCondCodeInMacroFusion()
/external/llvm/lib/Target/X86/
DX86InstrInfo.h34 COND_A = 0, enumerator
DX86InstrInfo.cpp3697 case X86::JA_1: return X86::COND_A; in getCondFromBranchOpc()
3712 case X86::SETAr: case X86::SETAm: return X86::COND_A; in getCondFromSETOpc()
3737 return X86::COND_A; in getCondFromCMovOpc()
3797 case X86::COND_A: return X86::JA_1; in GetCondBranchFromCond()
3820 case X86::COND_BE: return X86::COND_A; in GetOppositeBranchCondition()
3821 case X86::COND_A: return X86::COND_BE; in GetOppositeBranchCondition()
3845 case X86::COND_B: return X86::COND_A; in getSwappedCondition()
3847 case X86::COND_A: return X86::COND_B; in getSwappedCondition()
5226 case X86::COND_A: case X86::COND_AE: in optimizeCompareInstr()
DX86FastISel.cpp186 case CmpInst::FCMP_OGT: CC = X86::COND_A; break; in getX86ConditionCode()
202 case CmpInst::ICMP_UGT: CC = X86::COND_A; break; in getX86ConditionCode()
DX86ISelLowering.cpp3945 case X86::COND_A: in isX86CCUnsigned()
3967 case ISD::SETUGT: return X86::COND_A; in TranslateIntegerX86CC()
4031 case ISD::SETGT: return X86::COND_A; in TranslateX86CC()
4061 case X86::COND_A: in hasFPCMov()
14627 case X86::COND_A: case X86::COND_AE: in EmitTest()
17795 DAG.getConstant(X86::COND_A, dl, MVT::i8), Comi); in LowerINTRINSIC_WO_CHAIN()
17799 DAG.getConstant(X86::COND_A, dl, MVT::i8), InvComi); in LowerINTRINSIC_WO_CHAIN()
18012 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
18051 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
18055 X86CC = X86::COND_A; in LowerINTRINSIC_WO_CHAIN()
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc22318 MI->getOperand(3).getImm() == X86::COND_A
22326 MI->getOperand(3).getImm() == X86::COND_A
22334 MI->getOperand(3).getImm() == X86::COND_A
22342 MI->getOperand(3).getImm() == X86::COND_A
22350 MI->getOperand(3).getImm() == X86::COND_A
22361 if (MI->getOperand(7).getImm() == X86::COND_A)
22375 MI->getOperand(7).getImm() == X86::COND_A
22383 MI->getOperand(7).getImm() == X86::COND_A
22391 MI->getOperand(7).getImm() == X86::COND_A
22399 MI->getOperand(7).getImm() == X86::COND_A
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp2090 .Cases("a", "nbe", X86::COND_A) // Above/Neither Below nor Equal in ParseConditionCode()
/external/llvm-project/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp2693 .Cases("a", "nbe", X86::COND_A) // Above/Neither Below nor Equal in ParseConditionCode()