| /external/vixl/test/aarch32/config/ |
| D | rd-rn-rm.json | 34 "Crc32cb", // CRC32CB{<q>} <Rd>, <Rn>, <Rm> ; A1
35 // CRC32CB{<q>} <Rd>, <Rn>, <Rm> ; T1
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| /external/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 261 case CRC32CB: in VisitDataProcessing2Source()
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| D | constants-aarch64.h | 1476 CRC32CB = DataProcessing2SourceFixed | 0x00005000, enumerator
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| D | disasm-aarch64.cc | 835 case CRC32CB: in VisitDataProcessing2Source()
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| D | assembler-aarch64.cc | 865 Emit(SF(wm) | Rm(wm) | CRC32CB | Rn(wn) | Rd(wd)); in crc32cb()
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| D | simulator-aarch64.cc | 3376 case CRC32CB: { in VisitDataProcessing2Source()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 977 def CRC32CB : R6MMR6Rel, CRC32CB_ENC, CRC32CB_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 707 def : InstRW<[GenericWriteALU], (instrs CRC32B, CRC32H, CRC32W, CRC32CB,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 977 def CRC32CB : R6MMR6Rel, CRC32CB_ENC, CRC32CB_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 707 def : InstRW<[GenericWriteALU], (instrs CRC32B, CRC32H, CRC32W, CRC32CB,
|
| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 109 33706718U, // CRC32CB
2913 1048U, // CRC32CB
6256 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
6742 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
7272 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
7673 // CLZ, CMNzrr, CMPrr, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
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| D | ARMGenInstrInfo.inc | 3300 { 92, 3, 1, 0, 4, 0, 0xd00ULL, nullptr, nullptr, OperandInfo47,0,nullptr }, // Inst #92 = CRC32CB
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoB.td | 296 def CRC32CB : RVBUnary<0b0110000, 0b11000, 0b001, RISCVOpcode<0b0010011>,
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1357 741959283U, // CRC32CB
5581 17920U, // CRC32CB
9428 // AESD, AESE, AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, ...
9961 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
10543 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
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| D | ARMGenMCCodeEmitter.inc | 665 UINT64_C(3774874176), // CRC32CB
6208 case ARM::CRC32CB:
17340 CEFBS_IsARM_HasV8_HasCRC, // CRC32CB = 652
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1445 {DBGFIELD("CRC32CB") 1, false, false, 1, 2, 1, 1, 0, 0}, // #1185
3129 {DBGFIELD("CRC32CB") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #1185
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| D | MipsGenMCCodeEmitter.inc | 1143 UINT64_C(2080375055), // CRC32CB
6390 case Mips::CRC32CB:
10605 CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32CB = 1130
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| D | MipsGenAsmWriter.inc | 2371 268453419U, // CRC32CB
5125 0U, // CRC32CB
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| D | MipsGenInstrInfo.inc | 1145 CRC32CB = 1130,
3965 CRC32CB = 1185,
5991 …deledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #1130 = CRC32CB
16625 { Mips::CRC32CB, Mips::CRC32CB, (uint16_t)-1U },
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 666 ### CRC32CB ### subsection
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5896 case Mips::CRC32B: case Mips::CRC32CB: in checkTargetMatchPredicate()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5704 case Mips::CRC32B: case Mips::CRC32CB: in checkTargetMatchPredicate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4329 def CRC32CB : AI_crc32<1, 0b00, "cb", int_arm_crc32cb>;
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4800 def CRC32CB : AI_crc32<1, 0b00, "cb", int_arm_crc32cb>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4650 def CRC32CB : AI_crc32<1, 0b00, "cb", int_arm_crc32cb>;
|