| /external/vixl/test/aarch32/config/ |
| D | rd-rn-rm.json | 42 "Crc32w" // CRC32W{<q>} <Rd>, <Rn>, <Rm> ; A1
43 // CRC32W{<q>} <Rd>, <Rn>, <Rm> ; T1
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| /external/vixl/src/aarch64/ |
| D | cpu-features-auditor-aarch64.cc | 259 case CRC32W: in VisitDataProcessing2Source()
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| D | constants-aarch64.h | 1474 CRC32W = DataProcessing2SourceFixed | 0x00004800, enumerator
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| D | disasm-aarch64.cc | 828 case CRC32W: in VisitDataProcessing2Source()
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| D | assembler-aarch64.cc | 847 Emit(SF(wm) | Rm(wm) | CRC32W | Rn(wn) | Rd(wd)); in crc32w()
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| D | simulator-aarch64.cc | 3363 case CRC32W: { in VisitDataProcessing2Source()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 976 def CRC32W : R6MMR6Rel, CRC32W_ENC, CRC32W_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 707 def : InstRW<[GenericWriteALU], (instrs CRC32B, CRC32H, CRC32W, CRC32CB,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 976 def CRC32W : R6MMR6Rel, CRC32W_ENC, CRC32W_DESC, ISA_MIPS32R6, ASE_CRC;
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| D | MipsScheduleGeneric.td | 707 def : InstRW<[GenericWriteALU], (instrs CRC32B, CRC32H, CRC32W, CRC32CB,
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoB.td | 287 def CRC32W : RVBUnary<0b0110000, 0b10010, 0b001, RISCVOpcode<0b0010011>,
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1361 741959488U, // CRC32W
5585 17920U, // CRC32W
9961 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
10543 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
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| D | ARMGenMCCodeEmitter.inc | 669 UINT64_C(3779067968), // CRC32W
6212 case ARM::CRC32W: {
17344 CEFBS_IsARM_HasV8_HasCRC, // CRC32W = 656
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| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 113 33706855U, // CRC32W
2917 1048U, // CRC32W
6742 // AESIMC, AESMC, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, FLDM...
7272 // BFI, CPS3p, CRC32B, CRC32CB, CRC32CH, CRC32CW, CRC32H, CRC32W, MOVTi16...
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| D | ARMGenInstrInfo.inc | 3304 { 96, 3, 1, 0, 4, 0, 0xd00ULL, nullptr, nullptr, OperandInfo47,0,nullptr }, // Inst #96 = CRC32W
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1444 {DBGFIELD("CRC32W") 1, false, false, 1, 2, 1, 1, 0, 0}, // #1184
3128 {DBGFIELD("CRC32W") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #1184
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| D | MipsGenMCCodeEmitter.inc | 1149 UINT64_C(2080374927), // CRC32W
6396 case Mips::CRC32W: {
10611 CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32W = 1136
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| D | MipsGenAsmWriter.inc | 2377 268461612U, // CRC32W
5131 0U, // CRC32W
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| D | MipsGenInstrInfo.inc | 1151 CRC32W = 1136,
3964 CRC32W = 1184,
5997 …odeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #1136 = CRC32W
16631 { Mips::CRC32W, Mips::CRC32W, (uint16_t)-1U },
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 701 ### CRC32W ### subsection
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5898 case Mips::CRC32W: case Mips::CRC32CW: in checkTargetMatchPredicate()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5706 case Mips::CRC32W: case Mips::CRC32CW: in checkTargetMatchPredicate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4332 def CRC32W : AI_crc32<0, 0b10, "w", int_arm_crc32w>;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4803 def CRC32W : AI_crc32<0, 0b10, "w", int_arm_crc32w>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4653 def CRC32W : AI_crc32<0, 0b10, "w", int_arm_crc32w>;
|