/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/ |
D | KnownBitsTest.cpp | 19 unsigned CopyReg = Copies[Copies.size() - 1]; in TEST_F() local 20 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); in TEST_F() 39 unsigned CopyReg = Copies[Copies.size() - 1]; in TEST_F() local 40 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); in TEST_F() 78 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F() local 79 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); in TEST_F() 112 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F() local 113 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); in TEST_F() 150 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F() local 151 MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg); in TEST_F() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SILowerControlFlow.cpp | 216 Register CopyReg = SimpleIf ? SaveExecReg in emitIf() local 219 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), CopyReg) in emitIf() 227 .addReg(CopyReg) in emitIf() 237 .addReg(CopyReg); in emitIf() 278 LIS->createAndComputeVirtRegInterval(CopyReg); in emitIf() 293 Register CopyReg = MRI->createVirtualRegister(BoolRC); in emitElse() local 295 BuildMI(MBB, Start, DL, TII->get(AMDGPU::COPY), CopyReg) in emitElse() 304 .addReg(CopyReg); in emitElse() 346 LIS->createAndComputeVirtRegInterval(CopyReg); in emitElse()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 888 const unsigned *CopyReg = in spillCalleeSavedRegisters() local 897 while (HiRegToSave != AllHighRegsEnd && CopyReg != AllCopyRegsEnd) { in spillCalleeSavedRegisters() 905 .addReg(*CopyReg, RegState::Define) in spillCalleeSavedRegisters() 911 RegsToPush.push_back(*CopyReg); in spillCalleeSavedRegisters() 913 CopyReg = findNextOrderedReg(++CopyReg, CopyRegs, AllCopyRegsEnd); in spillCalleeSavedRegisters() 998 auto CopyReg = in restoreCalleeSavedRegisters() local 1005 while (HiRegToRestore != AllHighRegsEnd && CopyReg != AllCopyRegsEnd) { in restoreCalleeSavedRegisters() 1007 PopMIB.addReg(*CopyReg, RegState::Define); in restoreCalleeSavedRegisters() 1012 .addReg(*CopyReg, RegState::Kill) in restoreCalleeSavedRegisters() 1015 CopyReg = findNextOrderedReg(++CopyReg, CopyRegs, AllCopyRegsEnd); in restoreCalleeSavedRegisters()
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 888 const unsigned *CopyReg = in spillCalleeSavedRegisters() local 897 while (HiRegToSave != AllHighRegsEnd && CopyReg != AllCopyRegsEnd) { in spillCalleeSavedRegisters() 905 .addReg(*CopyReg, RegState::Define) in spillCalleeSavedRegisters() 911 RegsToPush.push_back(*CopyReg); in spillCalleeSavedRegisters() 913 CopyReg = findNextOrderedReg(++CopyReg, CopyRegs, AllCopyRegsEnd); in spillCalleeSavedRegisters() 996 auto CopyReg = in restoreCalleeSavedRegisters() local 1003 while (HiRegToRestore != AllHighRegsEnd && CopyReg != AllCopyRegsEnd) { in restoreCalleeSavedRegisters() 1005 PopMIB.addReg(*CopyReg, RegState::Define); in restoreCalleeSavedRegisters() 1010 .addReg(*CopyReg, RegState::Kill) in restoreCalleeSavedRegisters() 1013 CopyReg = findNextOrderedReg(++CopyReg, CopyRegs, AllCopyRegsEnd); in restoreCalleeSavedRegisters()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SILowerControlFlow.cpp | 260 Register CopyReg = SimpleIf ? SaveExecReg in emitIf() local 263 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), CopyReg) in emitIf() 266 LoweredIf.insert(CopyReg); in emitIf() 272 .addReg(CopyReg) in emitIf() 282 .addReg(CopyReg); in emitIf() 327 LIS->createAndComputeVirtRegInterval(CopyReg); in emitIf()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 712 Register CopyReg = SubRegMI->getOperand(1).getReg(); in simplifyCode() local 713 if (Register::isVirtualRegister(CopyReg)) in simplifyCode() 714 SrcMI = MRI->getVRegDef(CopyReg); in simplifyCode()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 875 Register CopyReg = SubRegMI->getOperand(1).getReg(); in simplifyCode() local 876 if (Register::isVirtualRegister(CopyReg)) in simplifyCode() 877 SrcMI = MRI->getVRegDef(CopyReg); in simplifyCode()
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 2380 unsigned CopyReg = createResultReg(CopyRC); in X86SelectTrunc() local 2382 TII.get(TargetOpcode::COPY), CopyReg).addReg(InputReg); in X86SelectTrunc() 2383 InputReg = CopyReg; in X86SelectTrunc() 3356 unsigned CopyReg = ResultReg + i; in fastLowerCall() local 3369 CopyReg = createResultReg(&X86::RFP80RegClass); in fastLowerCall() 3374 TII.get(TargetOpcode::COPY), CopyReg).addReg(VA.getLocReg()); in fastLowerCall() 3387 .addReg(CopyReg); in fastLowerCall()
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D | X86FrameLowering.cpp | 554 CopyReg = InProlog ? (unsigned)X86::RDX in emitStackProbeInline() local 601 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP); in emitStackProbeInline() 603 .addReg(CopyReg) in emitStackProbeInline()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 1090 Register CopyReg = createResultReg(&X86::GR32RegClass); in X86SelectCallAddress() local 1092 CopyReg) in X86SelectCallAddress() 1099 .addReg(CopyReg) in X86SelectCallAddress() 3573 unsigned CopyReg = ResultReg + i; in fastLowerCall() local 3587 CopyReg = createResultReg(&X86::RFP80RegClass); in fastLowerCall() 3592 TII.get(TargetOpcode::COPY), CopyReg).addReg(SrcReg); in fastLowerCall() 3605 .addReg(CopyReg); in fastLowerCall()
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D | X86FrameLowering.cpp | 783 CopyReg = InProlog ? X86::RDX in emitStackProbeInlineWindowsCoreCLR64() local 844 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP); in emitStackProbeInlineWindowsCoreCLR64() 846 .addReg(CopyReg) in emitStackProbeInlineWindowsCoreCLR64()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 591 CopyReg = InProlog ? X86::RDX in emitStackProbeInline() local 652 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP); in emitStackProbeInline() 654 .addReg(CopyReg) in emitStackProbeInline()
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D | X86FastISel.cpp | 3556 unsigned CopyReg = ResultReg + i; in fastLowerCall() local 3570 CopyReg = createResultReg(&X86::RFP80RegClass); in fastLowerCall() 3575 TII.get(TargetOpcode::COPY), CopyReg).addReg(SrcReg); in fastLowerCall() 3588 .addReg(CopyReg); in fastLowerCall()
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