| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 110 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const;
151 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs);
210 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs) in SchedulePostRATDList() argument
225 (AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) : in SchedulePostRATDList()
270 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const { in enablePostRAScheduler()
272 ST.getCriticalPathRCs(CriticalPathRCs); in enablePostRAScheduler()
295 SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs; in runOnMachineFunction() local
300 AntiDepMode, CriticalPathRCs)) in runOnMachineFunction()
315 CriticalPathRCs); in runOnMachineFunction()
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| D | AggressiveAntiDepBreaker.h | 134 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
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| D | AggressiveAntiDepBreaker.cpp | 127 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) in AggressiveAntiDepBreaker() argument
133 for (unsigned i = 0, e = CriticalPathRCs.size(); i < e; ++i) { in AggressiveAntiDepBreaker()
134 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]); in AggressiveAntiDepBreaker()
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| /external/llvm/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 110 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const;
151 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs);
210 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs) in SchedulePostRATDList() argument
225 (AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) : in SchedulePostRATDList()
270 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const { in enablePostRAScheduler()
272 ST.getCriticalPathRCs(CriticalPathRCs); in enablePostRAScheduler()
295 SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs; in runOnMachineFunction() local
300 AntiDepMode, CriticalPathRCs)) in runOnMachineFunction()
315 CriticalPathRCs); in runOnMachineFunction()
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| D | AggressiveAntiDepBreaker.h | 129 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
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| D | AggressiveAntiDepBreaker.cpp | 115 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) in AggressiveAntiDepBreaker() argument
122 for (unsigned i = 0, e = CriticalPathRCs.size(); i < e; ++i) { in AggressiveAntiDepBreaker()
123 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]); in AggressiveAntiDepBreaker()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 108 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const;
149 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs);
208 SmallVectorImpl<const TargetRegisterClass *> &CriticalPathRCs) in SchedulePostRATDList() argument
222 ? createAggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) in SchedulePostRATDList()
268 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) const { in enablePostRAScheduler()
270 ST.getCriticalPathRCs(CriticalPathRCs); in enablePostRAScheduler()
293 SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs; in runOnMachineFunction() local
298 AntiDepMode, CriticalPathRCs)) in runOnMachineFunction()
313 CriticalPathRCs); in runOnMachineFunction()
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| D | AggressiveAntiDepBreaker.cpp | 122 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) in AggressiveAntiDepBreaker() argument
128 for (unsigned i = 0, e = CriticalPathRCs.size(); i < e; ++i) { in AggressiveAntiDepBreaker()
129 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]); in AggressiveAntiDepBreaker()
1012 TargetSubtargetInfo::RegClassVector &CriticalPathRCs) { in createAggressiveAntiDepBreaker() argument
1013 return new AggressiveAntiDepBreaker(MFi, RCI, CriticalPathRCs); in createAggressiveAntiDepBreaker()
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| D | AggressiveAntiDepBreaker.h | 134 TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.cpp | 136 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
137 CriticalPathRCs.clear(); in getCriticalPathRCs()
138 CriticalPathRCs.push_back(isGP64bit() ? in getCriticalPathRCs()
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| D | MipsSubtarget.h | 167 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCSubtarget.cpp | 195 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
196 CriticalPathRCs.clear(); in getCriticalPathRCs()
197 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
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| D | PPCSubtarget.h | 303 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCSubtarget.cpp | 208 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
209 CriticalPathRCs.clear(); in getCriticalPathRCs()
210 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
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| D | PPCSubtarget.h | 345 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCSubtarget.cpp | 200 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
201 CriticalPathRCs.clear(); in getCriticalPathRCs()
202 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
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| D | PPCSubtarget.h | 357 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.cpp | 227 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
228 CriticalPathRCs.clear(); in getCriticalPathRCs()
229 CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass in getCriticalPathRCs()
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| D | MipsSubtarget.h | 227 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.cpp | 227 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
228 CriticalPathRCs.clear(); in getCriticalPathRCs()
229 CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass in getCriticalPathRCs()
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| D | MipsSubtarget.h | 224 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
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| /external/llvm/include/llvm/Target/ |
| D | TargetSubtargetInfo.h | 169 virtual void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs() argument
170 return CriticalPathRCs.clear(); in getCriticalPathRCs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetSubtargetInfo.h | 238 virtual void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs() argument
239 return CriticalPathRCs.clear(); in getCriticalPathRCs()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetSubtargetInfo.h | 243 virtual void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs() argument
244 return CriticalPathRCs.clear(); in getCriticalPathRCs()
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| D | AntiDepBreaker.h | 89 TargetSubtargetInfo::RegClassVector &CriticalPathRCs);
|