/external/llvm/lib/Target/AArch64/ |
D | AArch64CollectLOH.cpp | 314 unsigned CurReg = MO.getReg(); in initReachingDef() local 315 MapRegToId::const_iterator ItCurRegId = RegToId.find(CurReg); in initReachingDef() 318 CurReg = ItCurRegId->second; in initReachingDef() 321 if (!BBGen[CurReg] && !BBKillSet.test(CurReg)) in initReachingDef() 322 getSet(ReachableUses, MBB, CurReg, NbReg).insert(&MI); in initReachingDef() 324 if (BBGen[CurReg]) in initReachingDef() 325 getUses(ColorOpToReachedUses, CurReg, *BBGen[CurReg]).insert(&MI); in initReachingDef() 354 unsigned CurReg = MO.getReg(); in initReachingDef() local 355 MapRegToId::const_iterator ItCurRegId = RegToId.find(CurReg); in initReachingDef() 359 for (MCRegAliasIterator AI(CurReg, TRI, true); AI.isValid(); ++AI) { in initReachingDef() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRegNumbering.cpp | 90 unsigned CurReg = MFI.getParams().size(); in runOnMachineFunction() local 104 LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n"); in runOnMachineFunction() 105 MFI.setWAReg(VReg, CurReg++); in runOnMachineFunction()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRegNumbering.cpp | 93 unsigned CurReg = MFI.getParams().size(); in runOnMachineFunction() local 107 DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n"); in runOnMachineFunction() 108 MFI.setWAReg(VReg, CurReg++); in runOnMachineFunction()
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/external/llvm-project/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRegNumbering.cpp | 90 unsigned CurReg = MFI.getParams().size(); in runOnMachineFunction() local 104 LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " << CurReg << "\n"); in runOnMachineFunction() 105 MFI.setWAReg(VReg, CurReg++); in runOnMachineFunction()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SILowerI1Copies.cpp | 95 unsigned DstReg, unsigned PrevReg, unsigned CurReg); 820 unsigned PrevReg, unsigned CurReg) { in buildMergeLaneMasks() argument 824 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks() 828 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(CurReg); in buildMergeLaneMasks() 854 CurMaskedReg = CurReg; in buildMergeLaneMasks() 858 .addReg(CurReg) in buildMergeLaneMasks()
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D | SIInstrInfo.cpp | 4877 Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass); in emitLoadSRsrcFromVGPRLoop() local 4878 BuildMI(LoopBB, I, DL, TII.get(AMDGPU::REG_SEQUENCE), CurReg) in emitLoadSRsrcFromVGPRLoop() 4887 .addReg(CurReg); in emitLoadSRsrcFromVGPRLoop()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SILowerI1Copies.cpp | 95 unsigned DstReg, unsigned PrevReg, unsigned CurReg); 817 unsigned PrevReg, unsigned CurReg) { in buildMergeLaneMasks() argument 821 bool CurConstant = isConstantLaneMask(CurReg, CurVal); in buildMergeLaneMasks() 825 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(CurReg); in buildMergeLaneMasks() 851 CurMaskedReg = CurReg; in buildMergeLaneMasks() 855 .addReg(CurReg) in buildMergeLaneMasks()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86DomainReassignment.cpp | 552 unsigned CurReg = Worklist.pop_back_val(); in buildClosure() local 555 if (!C.insertEdge(CurReg)) in buildClosure() 559 MachineInstr *DefMI = MRI->getVRegDef(CurReg); in buildClosure() 583 for (auto &UseMI : MRI->use_nodbg_instructions(CurReg)) { in buildClosure() 586 if (usedAsAddr(UseMI, CurReg, TII)) { in buildClosure()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86DomainReassignment.cpp | 548 unsigned CurReg = Worklist.pop_back_val(); in buildClosure() local 551 if (!C.insertEdge(CurReg)) in buildClosure() 555 MachineInstr *DefMI = MRI->getVRegDef(CurReg); in buildClosure() 579 for (auto &UseMI : MRI->use_nodbg_instructions(CurReg)) { in buildClosure() 582 if (usedAsAddr(UseMI, CurReg, TII)) { in buildClosure()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2093 for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded; in tryFoldSPUpdateIntoPushPop() local 2094 --CurReg) { in tryFoldSPUpdateIntoPushPop() 2099 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false, in tryFoldSPUpdateIntoPushPop() 2109 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop() 2110 MI->getParent()->computeRegisterLiveness(TRI, CurReg, MI) != in tryFoldSPUpdateIntoPushPop() 2121 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false, in tryFoldSPUpdateIntoPushPop() 4422 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local 4423 bool CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain() 4424 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain() 4426 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2466 unsigned CurReg = RegClass->getRegister(CurRegEnc); in tryFoldSPUpdateIntoPushPop() local 2473 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false, in tryFoldSPUpdateIntoPushPop() 2483 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop() 2484 MI->getParent()->computeRegisterLiveness(TRI, CurReg, MI) != in tryFoldSPUpdateIntoPushPop() 2495 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false, in tryFoldSPUpdateIntoPushPop() 5074 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local 5075 bool CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain() 5076 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain() 5078 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() 5079 CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain() [all …]
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2516 unsigned CurReg = RegClass->getRegister(CurRegEnc); in tryFoldSPUpdateIntoPushPop() local 2523 RegList.push_back(MachineOperand::CreateReg(CurReg, false, false, in tryFoldSPUpdateIntoPushPop() 2533 if (isCalleeSavedRegister(CurReg, CSRegs) || in tryFoldSPUpdateIntoPushPop() 2534 MI->getParent()->computeRegisterLiveness(TRI, CurReg, MI) != in tryFoldSPUpdateIntoPushPop() 2545 RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false, in tryFoldSPUpdateIntoPushPop() 5110 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain() local 5111 bool CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain() 5112 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain() 5114 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain() 5115 CurUndef = !MI.readsRegister(CurReg, TRI); in setExecutionDomain() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 7755 unsigned CurReg = 0; in LowerCallTo() local 7761 ReturnValues.push_back(getCopyFromParts(CLI.DAG, CLI.DL, &InVals[CurReg], in LowerCallTo() 7764 CurReg += NumRegs; in LowerCallTo()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 9385 unsigned CurReg = 0; in LowerCallTo() local 9393 ReturnValues.push_back(getCopyFromParts(CLI.DAG, CLI.DL, &InVals[CurReg], in LowerCallTo() 9396 CurReg += NumRegs; in LowerCallTo()
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/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 9471 unsigned CurReg = 0; in LowerCallTo() local 9479 ReturnValues.push_back(getCopyFromParts(CLI.DAG, CLI.DL, &InVals[CurReg], in LowerCallTo() 9482 CurReg += NumRegs; in LowerCallTo()
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