| /external/libavc/common/arm/ |
| D | ih264_arm_memory_barrier.s | 45 @* Description : Adds DSB
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| /external/llvm/test/MC/ARM/ |
| D | invalid-barrier.s | 14 @ DSB
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| D | basic-arm-instructions-v8.s | 37 @ DSB (v8 barriers)
|
| D | basic-thumb2-instructions-v8.s | 67 @ DSB (ARMv8-only barriers)
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | invalid-barrier.s | 14 @ DSB
|
| D | basic-arm-instructions-v8.s | 37 @ DSB (v8 barriers)
|
| D | basic-thumb2-instructions-v8.s | 77 @ DSB (ARMv8-only barriers)
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | intrinsics-memory-barrier.ll | 27 ; Similarly for DSB.
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | intrinsics-memory-barrier.ll | 31 ; Similarly for DSB.
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | intrinsics-memory-barrier.ll | 31 ; Similarly for DSB.
|
| /external/llvm/test/CodeGen/ARM/ |
| D | intrinsics-memory-barrier.ll | 27 ; Similarly for DSB.
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SpeculationHardening.cpp | 221 BuildMI(MBB, MBBI, DL, TII->get(AArch64::DSB)).addImm(0xf); in insertFullSpeculationBarrier()
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| D | AArch64AsmPrinter.cpp | 1234 TmpInstDSB.setOpcode(AArch64::DSB); in emitInstruction()
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| D | AArch64SchedCyclone.td | 294 // SLREX,DMB,DSB
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| D | AArch64SchedFalkorDetails.td | 1244 def : InstRW<[FalkorWr_1LD_0cyc], (instrs CLREX, DMB, DSB)>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SpeculationHardening.cpp | 221 BuildMI(MBB, MBBI, DL, TII->get(AArch64::DSB)).addImm(0xf); in insertFullSpeculationBarrier()
|
| D | AArch64SchedCyclone.td | 293 // SLREX,DMB,DSB
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| D | AArch64SchedFalkorDetails.td | 1244 def : InstRW<[FalkorWr_1LD_0cyc], (instrs CLREX, DMB, DSB)>;
|
| /external/walt/hardware/enclosure/ |
| D | WALT_recessed_enclosure.stl | 28 …@���@DSB�>�@��L@��� �6�J�����DSB�>�@��L@��SB�t�@���@DSB�>�@���@���P���P�����DSB�>�@��L@DSB�…
93 …|B���@DSBűB��L@���P���P?����DSBűB��L@��RB�|B���@DSBűB���@��� �6�J?����DSBűB��L@DSBűB…
557 …AB_��?���@�������������??bAB_��?���@P;KBE��@���@L�AB���@���@�������������?DSB�>�@���@[^YB�KA���@…
|
| /external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/ |
| D | test_TARMAC | 174 75 clk cpu0 IT (75) 163a0cb0 d503319f O EL3h_s : DSB OSHLD
335 144 clk cpu0 IT (108) 163a1850 d5033f9f O EL3h_s : DSB SY
1324 599 clk cpu0 IT (563) 00210134 d5033f9f O EL3h_s : DSB SY
1401 619 clk cpu0 IT (583) 1041022c:00000021022c d5033f9f O EL3h_s : DSB SY
1575 650 clk cpu0 IT (614) 00098518:000010098518 d5033f9f O EL3h_s : DSB SY
1584 654 clk cpu0 IT (618) 000a59dc:0000100a59dc d5033f9f O EL3h_s : DSB SY
1593 656 clk cpu0 IT (620) 000a59e4:0000100a59e4 d5033f9f O EL3h_s : DSB SY
1595 658 clk cpu0 IT (622) 00098528:000010098528 d5033f9f O EL3h_s : DSB SY
1647 672 clk cpu0 IT (636) 0009c0c4:00001009c0c4 d5033f9f O EL3h_s : DSB SY
1670 680 clk cpu0 IT (644) 0009bfbc:00001009bfbc d5033f9f O EL3h_s : DSB SY
[all …]
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 292 // SLREX,DMB,DSB
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1364 140943U, // DSB
5588 0U, // DSB
9246 // DMB, DSB
12077 {ARM::DSB, 0, 3 },
12114 // ARM::DSB - 0
12210 // (DSB 0) - 0
12214 // (DSB 4) - 3
12218 // (DSB 12) - 6
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 5063 def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
6141 def : InstAlias<"dsb", (DSB 0xf), 0>, Requires<[IsARM, HasDB]>;
6142 def : InstAlias<"ssbb", (DSB 0x0), 1>, Requires<[IsARM, HasDB]>;
6143 def : InstAlias<"pssbb", (DSB 0x4), 1>, Requires<[IsARM, HasDB]>;
6146 def : InstAlias<"dfb", (DSB 0xc), 1>, Requires<[IsARM, HasDFB]>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4913 def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
5984 def : InstAlias<"dsb", (DSB 0xf), 0>, Requires<[IsARM, HasDB]>;
5985 def : InstAlias<"ssbb", (DSB 0x0), 1>, Requires<[IsARM, HasDB]>;
5986 def : InstAlias<"pssbb", (DSB 0x4), 1>, Requires<[IsARM, HasDB]>;
5989 def : InstAlias<"dfb", (DSB 0xc), 1>, Requires<[IsARM, HasDFB]>;
|
| /external/OpenCSD/decoder/tests/snapshots/TC2/ds5-dumps/ |
| D | ptmv1_0x13.txt | 44 Instruction 31 S:0xC0018DB8 0xF3BF8F4F 0 DSB false
2728 Instruction 2639 S:0xC003C0BC 0xF3BF8F4F 0 DSB false
3427 Instruction 3316 S:0xC003CA0A 0xF3BF8F4F 0 DSB false
4627 Instruction 4482 S:0xC002D9D0 0xF3BF8F4F 0 DSB false
4840 Instruction 4683 S:0xC00171BE 0xF3BF8F4F 0 DSB false
4847 Instruction 4690 S:0xC00171D6 0xF3BF8F4F 0 DSB false
4966 Instruction 4802 S:0xC00171BE 0xF3BF8F4F 0 DSB false
4973 Instruction 4809 S:0xC00171D6 0xF3BF8F4F 0 DSB false
5072 Instruction 4903 S:0xC00171BE 0xF3BF8F4F 0 DSB false
5079 Instruction 4910 S:0xC00171D6 0xF3BF8F4F 0 DSB false
[all …]
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