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Searched refs:FIRST_TARGET_MEMORY_OPCODE (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISD.def25 // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h777 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+300; variable
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h29 FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h29 FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h955 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+500; variable
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h1178 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END + 500; variable
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h305 FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.h61 LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.h62 LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.h62 LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h297 ATOMIC_SWAPW = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h489 FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h486 FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h322 ATOMIC_SWAPW = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h195 LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/Mips/
DMipsISelLowering.h202 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h321 ATOMIC_SWAPW = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/ARM/
DARMISelLowering.h193 VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm-project/llvm/lib/Target/Mips/
DMipsISelLowering.h245 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.h247 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h346 STBRX = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/X86/
DX86ISelLowering.h543 LCMPXCHG_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.h258 VLD1DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.h301 VLD1DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h249 LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE,

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