| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InsertWait.cpp | 77 case X86::FNINIT: in isX87ControlInstruction()
102 case X86::FNINIT: in isX87NonWaitingControlInstruction()
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| D | X86ScheduleZnver2.td | 1007 // FNINIT.
1008 def : InstRW<[WriteMicrocoded], (instrs FNINIT)>;
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| D | X86ScheduleZnver1.td | 998 // FNINIT.
999 def : InstRW<[WriteMicrocoded], (instrs FNINIT)>;
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| D | X86ScheduleAtom.td | 778 def : InstRW<[AtomWrite01_63], (instrs FNINIT)>;
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| D | X86SchedSandyBridge.td | 767 def: InstRW<[SBWriteResGroup41], (instrs FNINIT)>;
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| D | X86InstrFPStack.td | 717 def FNINIT : I<0xDB, MRM_E3, (outs), (ins), "fninit", []>;
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| D | X86SchedBroadwell.td | 1586 def: InstRW<[BWWriteResGroup200], (instrs FNINIT)>;
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| D | X86SchedHaswell.td | 1781 def: InstRW<[HWWriteResGroup180], (instrs FNINIT)>;
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| D | X86SchedSkylakeClient.td | 1737 def: InstRW<[SKLWriteResGroup220], (instrs FNINIT)>;
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| D | X86SchedSkylakeServer.td | 2433 def: InstRW<[SKXWriteResGroup263], (instrs FNINIT)>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ScheduleZnver2.td | 995 // FNINIT.
996 def : InstRW<[WriteMicrocoded], (instrs FNINIT)>;
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| D | X86ScheduleZnver1.td | 995 // FNINIT.
996 def : InstRW<[WriteMicrocoded], (instrs FNINIT)>;
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| D | X86ScheduleAtom.td | 775 def : InstRW<[AtomWrite01_63], (instrs FNINIT)>;
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| D | X86SchedSandyBridge.td | 764 def: InstRW<[SBWriteResGroup41], (instrs FNINIT)>;
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| D | X86InstrFPStack.td | 721 def FNINIT : I<0xDB, MRM_E3, (outs), (ins), "fninit", []>;
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| D | X86SchedBroadwell.td | 1595 def: InstRW<[BWWriteResGroup200], (instrs FNINIT)>;
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| D | X86SchedSkylakeClient.td | 1736 def: InstRW<[SKLWriteResGroup220], (instrs FNINIT)>;
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| D | X86SchedHaswell.td | 1778 def: InstRW<[HWWriteResGroup180], (instrs FNINIT)>;
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| D | X86SchedSkylakeServer.td | 2445 def: InstRW<[SKXWriteResGroup263], (instrs FNINIT)>;
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| /external/llvm/lib/Target/X86/ |
| D | X86SchedHaswell.td | 1268 // FNINIT.
1272 def : InstRW<[WriteFNINIT], (instregex "FNINIT")>;
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| D | X86InstrFPStack.td | 631 def FNINIT : I<0xDB, MRM_E3, (outs), (ins), "fninit", [], IIC_FNINIT>;
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 731 #define FNINIT CHOICE(fninit, fninit, finit) macro
1444 #define FNINIT fninit macro
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenSubtargetInfo.inc | 6374 {DBGFIELD("FNINIT") 1, false, false, 60, 1, 44, 1, 0, 0}, // #685
7751 {DBGFIELD("FNINIT") 1, false, false, 96, 2, 2, 1, 0, 0}, // #685
9128 {DBGFIELD("FNINIT") 15, false, false, 1733, 9, 83, 1, 0, 0}, // #685
10505 {DBGFIELD("FNINIT") 1, false, false, 1, 1, 2, 1, 0, 0}, // #685
11882 {DBGFIELD("FNINIT") 15, false, false, 3260, 8, 83, 1, 0, 0}, // #685
13259 {DBGFIELD("FNINIT") 4, false, false, 4179, 5, 6, 1, 0, 0}, // #685
14636 {DBGFIELD("FNINIT") 15, false, false, 1733, 9, 83, 1, 0, 0}, // #685
16013 {DBGFIELD("FNINIT") 1, false, false, 3805, 2, 2, 1, 0, 0}, // #685
17390 {DBGFIELD("FNINIT") 15, false, false, 3260, 8, 83, 1, 0, 0}, // #685
18767 {DBGFIELD("FNINIT") 1, false, false, 0, 0, 2, 1, 0, 0}, // #685
[all …]
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| /external/capstone/arch/X86/ |
| D | X86GenAsmWriter1.inc | 801 11048U, // FNINIT
9658 0U, // FNINIT
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| D | X86GenAsmWriter.inc | 801 13859U, // FNINIT
9658 0U, // FNINIT
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