1 //- X86Insertwait.cpp - Strict-Fp:Insert wait instruction X87 instructions --//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the pass which insert x86 wait instructions after each
10 // X87 instructions when strict float is enabled.
11 //
12 // The logic to insert a wait instruction after an X87 instruction is as below:
13 // 1. If the X87 instruction don't raise float exception nor is a load/store
14 // instruction, or is a x87 control instruction, don't insert wait.
15 // 2. If the X87 instruction is an instruction which the following instruction
16 // is an X87 exception synchronizing X87 instruction, don't insert wait.
17 // 3. For other situations, insert wait instruction.
18 //
19 //===----------------------------------------------------------------------===//
20
21 #include "X86.h"
22 #include "X86InstrInfo.h"
23 #include "X86Subtarget.h"
24 #include "llvm/CodeGen/MachineBasicBlock.h"
25 #include "llvm/CodeGen/MachineFunction.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineInstr.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/MachineOperand.h"
30 #include "llvm/IR/DebugLoc.h"
31 #include "llvm/Support/Debug.h"
32
33 using namespace llvm;
34
35 #define DEBUG_TYPE "x86-insert-wait"
36
37 namespace {
38
39 class WaitInsert : public MachineFunctionPass {
40 public:
41 static char ID;
42
WaitInsert()43 WaitInsert() : MachineFunctionPass(ID) {}
44
45 bool runOnMachineFunction(MachineFunction &MF) override;
46
getPassName() const47 StringRef getPassName() const override {
48 return "X86 insert wait instruction";
49 }
50 };
51
52 } // namespace
53
54 char WaitInsert::ID = 0;
55
createX86InsertX87waitPass()56 FunctionPass *llvm::createX86InsertX87waitPass() { return new WaitInsert(); }
57
58 /// Return true if the Reg is X87 register.
isX87Reg(unsigned Reg)59 static bool isX87Reg(unsigned Reg) {
60 return (Reg == X86::FPCW || Reg == X86::FPSW ||
61 (Reg >= X86::ST0 && Reg <= X86::ST7));
62 }
63
64 /// check if the instruction is X87 instruction
isX87Instruction(MachineInstr & MI)65 static bool isX87Instruction(MachineInstr &MI) {
66 for (const MachineOperand &MO : MI.operands()) {
67 if (!MO.isReg())
68 continue;
69 if (isX87Reg(MO.getReg()))
70 return true;
71 }
72 return false;
73 }
74
isX87ControlInstruction(MachineInstr & MI)75 static bool isX87ControlInstruction(MachineInstr &MI) {
76 switch (MI.getOpcode()) {
77 case X86::FNINIT:
78 case X86::FLDCW16m:
79 case X86::FNSTCW16m:
80 case X86::FNSTSW16r:
81 case X86::FNSTSWm:
82 case X86::FNCLEX:
83 case X86::FLDENVm:
84 case X86::FSTENVm:
85 case X86::FRSTORm:
86 case X86::FSAVEm:
87 case X86::FINCSTP:
88 case X86::FDECSTP:
89 case X86::FFREE:
90 case X86::FFREEP:
91 case X86::FNOP:
92 case X86::WAIT:
93 return true;
94 default:
95 return false;
96 }
97 }
98
isX87NonWaitingControlInstruction(MachineInstr & MI)99 static bool isX87NonWaitingControlInstruction(MachineInstr &MI) {
100 // a few special control instructions don't perform a wait operation
101 switch (MI.getOpcode()) {
102 case X86::FNINIT:
103 case X86::FNSTSW16r:
104 case X86::FNSTSWm:
105 case X86::FNSTCW16m:
106 case X86::FNCLEX:
107 return true;
108 default:
109 return false;
110 }
111 }
112
runOnMachineFunction(MachineFunction & MF)113 bool WaitInsert::runOnMachineFunction(MachineFunction &MF) {
114 if (!MF.getFunction().hasFnAttribute(Attribute::StrictFP))
115 return false;
116
117 const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>();
118 const X86InstrInfo *TII = ST.getInstrInfo();
119 bool Changed = false;
120
121 for (MachineBasicBlock &MBB : MF) {
122 for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
123 // Jump non X87 instruction.
124 if (!isX87Instruction(*MI))
125 continue;
126 // If the instruction instruction neither has float exception nor is
127 // a load/store instruction, or the instruction is x87 control
128 // instruction, do not insert wait.
129 if (!(MI->mayRaiseFPException() || MI->mayLoadOrStore()) ||
130 isX87ControlInstruction(*MI))
131 continue;
132 // If the following instruction is an X87 instruction and isn't an X87
133 // non-waiting control instruction, we can omit insert wait instruction.
134 MachineBasicBlock::iterator AfterMI = std::next(MI);
135 if (AfterMI != MBB.end() && isX87Instruction(*AfterMI) &&
136 !isX87NonWaitingControlInstruction(*AfterMI))
137 continue;
138
139 BuildMI(MBB, AfterMI, MI->getDebugLoc(), TII->get(X86::WAIT));
140 LLVM_DEBUG(dbgs() << "\nInsert wait after:\t" << *MI);
141 // Jump the newly inserting wait
142 ++MI;
143 Changed = true;
144 }
145 }
146 return Changed;
147 }
148