| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 385 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP() local
390 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
404 MO.setReg(FPReg); in replaceFPWithRealFP()
647 Register FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue() local
804 .addReg(FPReg) in emitPrologue()
969 .addReg(FPReg, RegState::Kill) // Save FP. in emitPrologue()
1007 .addReg(FPReg) in emitPrologue()
1032 .addReg(FPReg) in emitPrologue()
1074 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1111 BuildMI(MBB, MBBI, dl, OrInst, FPReg) in emitPrologue()
[all …]
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| D | PPCFastISel.cpp | 1129 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned); in SelectIToFP() local
1130 if (FPReg == 0) in SelectIToFP()
1145 .addReg(FPReg); in SelectIToFP()
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| /external/llvm-project/lldb/source/Plugins/Process/Utility/ |
| D | RegisterContextWindows_x86_64.cpp | 72 } FPReg; typedef
75 (sizeof(GPR) + LLVM_EXTENSION offsetof(FPReg, regname))
79 #reg, NULL, sizeof(((FPReg *)nullptr)->reg), FPR_OFFSET(reg), \
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 116 Register FPReg = getFPReg(STI); in emitPrologue() local
177 if (STI.isRegisterReservedByUser(FPReg)) in emitPrologue()
181 adjustReg(MBB, MBBI, DL, FPReg, SPReg, in emitPrologue()
186 nullptr, RI->getDwarfRegNum(FPReg, true), 0)); in emitPrologue()
250 Register FPReg = getFPReg(STI); in emitEpilogue() local
282 adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset, in emitEpilogue()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 560 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP() local
565 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
579 MO.setReg(FPReg); in replaceFPWithRealFP()
833 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue() local
1010 .addReg(FPReg) in emitPrologue()
1152 .addReg(FPReg, RegState::Kill) // Save FP. in emitPrologue()
1190 .addReg(FPReg) in emitPrologue()
1215 .addReg(FPReg) in emitPrologue()
1257 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1294 BuildMI(MBB, MBBI, dl, OrInst, FPReg) in emitPrologue()
[all …]
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| D | PPCFastISel.cpp | 1127 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned); in SelectIToFP() local
1128 if (FPReg == 0) in SelectIToFP()
1143 .addReg(FPReg); in SelectIToFP()
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 426 unsigned FPReg = MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding() local
429 FPReg = getXRegFromWReg(FPReg); in generateCompactUnwindEncoding()
431 assert(LRReg == AArch64::LR && FPReg == AArch64::FP && in generateCompactUnwindEncoding()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 520 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP() local
526 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
527 unsigned BP8Reg = HasBP ? (unsigned) PPC::X30 : FPReg; in replaceFPWithRealFP()
540 MO.setReg(FPReg); in replaceFPWithRealFP()
749 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue() local
883 .addReg(FPReg) in emitPrologue()
1001 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1038 BuildMI(MBB, MBBI, dl, OrInst, FPReg) in emitPrologue()
1045 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1131 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitEpilogue() local
[all …]
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| D | PPCFastISel.cpp | 1046 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned); in SelectIToFP() local
1047 if (FPReg == 0) in SelectIToFP()
1062 .addReg(FPReg); in SelectIToFP()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMELFStreamer.cpp | 612 unsigned FPReg; // Frame pointer register member in __anonbd609b5d0111::ARMELFStreamer
1128 FPReg = ARM::SP; in EHReset()
1225 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes()
1293 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && in emitSetFP()
1297 FPReg = NewFPReg; in emitSetFP()
1308 assert(FPReg == ARM::SP && "current FP must be SP"); in emitMovSP()
1312 FPReg = Reg; in emitMovSP()
1316 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP()
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 320 Register FPReg = getFPReg(STI); in emitPrologue() local
431 if (STI.isRegisterReservedByUser(FPReg)) in emitPrologue()
435 adjustReg(MBB, MBBI, DL, FPReg, SPReg, in emitPrologue()
441 nullptr, RI->getDwarfRegNum(FPReg, true), RVFI->getVarArgsSaveSize())); in emitPrologue()
505 Register FPReg = getFPReg(STI); in emitEpilogue() local
553 adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset, in emitEpilogue()
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| /external/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 612 unsigned FPReg = *MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding() local
615 FPReg = getXRegFromWReg(FPReg); in generateCompactUnwindEncoding()
617 assert(LRReg == AArch64::LR && FPReg == AArch64::FP && in generateCompactUnwindEncoding()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64AsmBackend.cpp | 612 unsigned FPReg = *MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding() local
615 FPReg = getXRegFromWReg(FPReg); in generateCompactUnwindEncoding()
617 assert(LRReg == AArch64::LR && FPReg == AArch64::FP && in generateCompactUnwindEncoding()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMELFStreamer.cpp | 704 unsigned FPReg; // Frame pointer register member in __anone0d61fbf0111::ARMELFStreamer
1247 FPReg = ARM::SP; in EHReset()
1349 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes()
1417 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && in emitSetFP()
1421 FPReg = NewFPReg; in emitSetFP()
1432 assert(FPReg == ARM::SP && "current FP must be SP"); in emitMovSP()
1436 FPReg = Reg; in emitMovSP()
1440 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP()
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| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMELFStreamer.cpp | 696 unsigned FPReg; // Frame pointer register member in __anon41c5554b0111::ARMELFStreamer
1240 FPReg = ARM::SP; in EHReset()
1342 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes()
1410 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && in emitSetFP()
1414 FPReg = NewFPReg; in emitSetFP()
1425 assert(FPReg == ARM::SP && "current FP must be SP"); in emitMovSP()
1429 FPReg = Reg; in emitMovSP()
1433 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP()
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| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1549 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1555 FPKills |= 1U << FPReg; in handleSpecialFP()
1576 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1580 Op.setReg(getSTReg(FPReg)); in handleSpecialFP()
1583 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
1600 unsigned FPReg = countTrailingZeros(FPKills); in handleSpecialFP() local
1601 if (isLive(FPReg)) in handleSpecialFP()
1602 freeStackSlotAfter(Inst, FPReg); in handleSpecialFP()
1603 FPKills &= ~(1U << FPReg); in handleSpecialFP()
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| D | X86FrameLowering.cpp | 1842 unsigned FPReg = TRI->getFrameRegister(MF); in assignCalleeSavedSpillSlots() local
1844 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1615 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1621 FPKills |= 1U << FPReg; in handleSpecialFP()
1645 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1649 Op.setReg(getSTReg(FPReg)); in handleSpecialFP()
1652 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
1669 unsigned FPReg = countTrailingZeros(FPKills); in handleSpecialFP() local
1670 if (isLive(FPReg)) in handleSpecialFP()
1671 freeStackSlotAfter(Inst, FPReg); in handleSpecialFP()
1672 FPKills &= ~(1U << FPReg); in handleSpecialFP()
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| D | X86FrameLowering.cpp | 2344 Register FPReg = TRI->getFrameRegister(MF); in assignCalleeSavedSpillSlots() local
2346 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1612 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1618 FPKills |= 1U << FPReg; in handleSpecialFP()
1642 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1646 Op.setReg(getSTReg(FPReg)); in handleSpecialFP()
1649 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
1666 unsigned FPReg = countTrailingZeros(FPKills); in handleSpecialFP() local
1667 if (isLive(FPReg)) in handleSpecialFP()
1668 freeStackSlotAfter(Inst, FPReg); in handleSpecialFP()
1669 FPKills &= ~(1U << FPReg); in handleSpecialFP()
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| D | X86FrameLowering.cpp | 2002 Register FPReg = TRI->getFrameRegister(MF); in assignCalleeSavedSpillSlots() local
2004 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 632 Register FPReg = MFI->getFrameOffsetReg(); in emitEntryFunctionPrologue() local
633 assert(FPReg != AMDGPU::FP_REG); in emitEntryFunctionPrologue()
634 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), FPReg).addImm(0); in emitEntryFunctionPrologue()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 69 int FPReg; member in __anon4e9b8dc90111::UnwindContext
72 UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} in UnwindContext()
87 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg()
88 int getFPReg() const { return FPReg; } in getFPReg()
127 FPReg = ARM::SP; in reset()
9613 int FPReg = tryParseRegister(); in parseDirectiveSetFP() local
9614 if (FPReg == -1) { in parseDirectiveSetFP()
9640 UC.saveFPReg(FPReg); in parseDirectiveSetFP()
9670 getTargetStreamer().emitSetFP(static_cast<unsigned>(FPReg), in parseDirectiveSetFP()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 117 int FPReg; member in __anonfbb24ceb0111::UnwindContext
120 UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} in UnwindContext()
136 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg()
137 int getFPReg() const { return FPReg; } in getFPReg()
179 FPReg = ARM::SP; in reset()
11123 int FPReg = tryParseRegister(); in parseDirectiveSetFP() local
11125 if (check(FPReg == -1, FPRegLoc, "frame pointer register expected") || in parseDirectiveSetFP()
11138 UC.saveFPReg(FPReg); in parseDirectiveSetFP()
11162 getTargetStreamer().emitSetFP(static_cast<unsigned>(FPReg), in parseDirectiveSetFP()
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| /external/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 118 int FPReg; member in __anon231adaf70111::UnwindContext
121 UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} in UnwindContext()
137 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg()
138 int getFPReg() const { return FPReg; } in getFPReg()
180 FPReg = ARM::SP; in reset()
11422 int FPReg = tryParseRegister(); in parseDirectiveSetFP() local
11424 if (check(FPReg == -1, FPRegLoc, "frame pointer register expected") || in parseDirectiveSetFP()
11437 UC.saveFPReg(FPReg); in parseDirectiveSetFP()
11461 getTargetStreamer().emitSetFP(static_cast<unsigned>(FPReg), in parseDirectiveSetFP()
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