Home
last modified time | relevance | path

Searched refs:G5 (Results 1 – 25 of 109) sorted by relevance

12345

/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dvec_splat.ll3 …UN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | FileCheck %s --check-prefixes=ALL,G5
27 ; G5-LABEL: splat:
28 ; G5: # %bb.0:
29 ; G5-NEXT: stwu 1, -32(1)
30 ; G5-NEXT: stfs 1, 16(1)
31 ; G5-NEXT: addi 5, 1, 16
32 ; G5-NEXT: lvx 2, 0, 5
33 ; G5-NEXT: lvx 3, 0, 4
34 ; G5-NEXT: vspltw 2, 2, 0
35 ; G5-NEXT: vaddfp 2, 3, 2
[all …]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dconstant-fold-shifts.ll18 %G5 = getelementptr i64, i64* undef, i712 %B9
19 store i64* %G5, i64** undef
33 %G5 = getelementptr i64, i64* undef, i712 %B9
34 store i64* %G5, i64** undef
/external/llvm/test/Transforms/GlobalOpt/
Dglobal-demotion.ll7 @G5 = internal global i32 5
59 ; CHECK-NOT: @G5
60 store i32 4, i32* @G5
61 %x = bitcast i32* @G5 to i16*
/external/llvm-project/llvm/test/Transforms/GlobalOpt/
Dglobal-demotion.ll7 @G5 = internal global i32 5
59 ; CHECK-NOT: @G5
60 store i32 4, i32* @G5
61 %x = bitcast i32* @G5 to i16*
/external/llvm/test/CodeGen/XCore/
Dglobals.ll42 ; CHECK: ldaw r0, dp[G5]
43 ret i32** @G5
103 @G5 = unnamed_addr constant i32* @G1
105 ; CHECK: G5:
/external/llvm-project/llvm/test/CodeGen/XCore/
Dglobals.ll42 ; CHECK: ldaw r0, dp[G5]
43 ret i32** @G5
103 @G5 = unnamed_addr constant i32* @G1
105 ; CHECK: G5:
/external/ltp/testcases/kernel/syscalls/ptrace/
Dsimple_tracer.c84 #define G5 u_regs[4] in decode_regs()
99 decode(G5); in decode_regs()
/external/webp/src/dsp/
Dcommon_sse41.h42 __m128i G0, G1, G2, G3, G4, G5; in VP8PlanarTo24b_SSE41() local
87 const __m128i RG5 = _mm_or_si128(R5, G5); in VP8PlanarTo24b_SSE41()
/external/llvm/lib/Target/PowerPC/
DPPCScheduleG5.td1 //===-- PPCScheduleG5.td - PPC G5 Scheduling Definitions ---*- tablegen -*-===//
10 // This file defines the itinerary class data for the G5 (970) processor.
117 // G5 machine model for scheduling and other instruction cost heuristics.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCScheduleG5.td1 //===-- PPCScheduleG5.td - PPC G5 Scheduling Definitions ---*- tablegen -*-===//
9 // This file defines the itinerary class data for the G5 (970) processor.
115 // G5 machine model for scheduling and other instruction cost heuristics.
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCScheduleG5.td1 //===-- PPCScheduleG5.td - PPC G5 Scheduling Definitions ---*- tablegen -*-===//
9 // This file defines the itinerary class data for the G5 (970) processor.
115 // G5 machine model for scheduling and other instruction cost heuristics.
/external/freetype/builds/compiler/
Dvisualage.mk63 CFLAGS ?= /Q- /Gd+ /O2 /G5 /W3 /C
Dintelc.mk73 CFLAGS ?= /nologo /c /Ox /G5 /W3 /Qwd32
/external/unicode/testunicode.xcodeproj/
Dproject.pbxproj122 GCC_MODEL_TUNING = G5;
138 GCC_MODEL_TUNING = G5;
/external/llvm-project/llvm/test/CodeGen/X86/
Dglobal-sections.ll160 ; int G5 = 47;
161 @G5 = global i32 47
164 ; LINUX: .globl G5
165 ; LINUX: G5:
/external/llvm/test/CodeGen/X86/
Dglobal-sections.ll160 ; int G5 = 47;
161 @G5 = global i32 47
164 ; LINUX: .globl G5
165 ; LINUX: G5:
/external/tinyxml2/tinyxml2/tinyxml2.xcodeproj/
Dproject.pbxproj161 GCC_MODEL_TUNING = G5;
178 GCC_MODEL_TUNING = G5;
/external/clang/test/SemaOpenCL/
Dstorageclass-cl20.cl17 extern global int G5;
/external/antlr/runtime/ObjC/Framework/ANTLR.xcodeproj/
Dproject.pbxproj2997 GCC_MODEL_TUNING = G5;
3166 GCC_MODEL_TUNING = G5;
3333 GCC_MODEL_TUNING = G5;
3453 GCC_MODEL_TUNING = G5;
3478 GCC_MODEL_TUNING = G5;
3504 GCC_MODEL_TUNING = G5;
3532 GCC_MODEL_TUNING = G5;
3557 GCC_MODEL_TUNING = G5;
3583 GCC_MODEL_TUNING = G5;
3611 GCC_MODEL_TUNING = G5;
[all …]
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dbad-reduction.ll15 ; CHECK-NEXT: [[G5:%.*]] = getelementptr inbounds [[V8I8]], %v8i8* [[P]], i64 0, i32 5
23 ; CHECK-NEXT: [[T5:%.*]] = load i8, i8* [[G5]], align 1
103 ; CHECK-NEXT: [[G5:%.*]] = getelementptr inbounds [[V8I8]], %v8i8* [[P]], i64 0, i32 5
111 ; CHECK-NEXT: [[T5:%.*]] = load i8, i8* [[G5]], align 1
193 ; CHECK-NEXT: [[G5:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 5
201 ; CHECK-NEXT: [[LD5:%.*]] = load i8, i8* [[G5]], align 1
279 ; CHECK-NEXT: [[G5:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 5
287 ; CHECK-NEXT: [[LD5:%.*]] = load i8, i8* [[G5]], align 1
/external/python/cryptography/vectors/cryptography_vectors/x509/PKITS_data/smime/
DSignedInvalidDNnameConstraintsTest12.eml111 6/lfdXp/4GfltuBRC8SK4VC8nO63G6RIKQ3OKOvr3xBrmoS7UfMguE7WBDE+G5+t
/external/sonivox/arm-wt-22k/jetcreator_lib_src/darwin-x86/EASLIb.xcodeproj/
Dproject.pbxproj198 GCC_MODEL_TUNING = G5;
259 GCC_MODEL_TUNING = G5;
/external/skqp/site/dev/contrib/
Dcqkeywords.md10 … Dry Run](https://groups.google.com/a/chromium.org/forum/#!topic/chromium-dev/G5-X0_tfmok) feature.
/external/python/cpython2/Mac/BuildScript/
DREADME.txt165 ``i386``, ``x86_64``, ``ppc``, and ``ppc64`` (G5). ``ppc64`` executable
166 variants can only be run on G5 machines running 10.5. Note that,
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td132 def G5 : Ri< 5, "G5">, DwarfRegNum<[5]>;
286 def G4_G5 : Rdi<4, "G4", [G4, G5]>;

12345