/external/capstone/arch/ARM/ |
D | ARMBaseInfo.h | 114 inline static const char *ARM_MB_MemBOptToString(unsigned val, bool HasV8) in ARM_MB_MemBOptToString() argument 120 case ARM_MB_LD: return HasV8 ? "ld" : "#0xd"; in ARM_MB_MemBOptToString() 124 case ARM_MB_ISHLD: return HasV8 ? "ishld" : "#0x9"; in ARM_MB_MemBOptToString() 128 case ARM_MB_NSHLD: return HasV8 ? "nshld" : "#0x5"; in ARM_MB_MemBOptToString() 132 case ARM_MB_OSHLD: return HasV8 ? "oshld" : "#0x1"; in ARM_MB_MemBOptToString()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 77 inline static const char *MemBOptToString(unsigned val, bool HasV8) { in MemBOptToString() argument 82 case LD: return HasV8 ? "ld" : "#0xd"; in MemBOptToString() 86 case ISHLD: return HasV8 ? "ishld" : "#0x9"; in MemBOptToString() 90 case NSHLD: return HasV8 ? "nshld" : "#0x5"; in MemBOptToString() 94 case OSHLD: return HasV8 ? "oshld" : "#0x1"; in MemBOptToString()
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/external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 77 inline static const char *MemBOptToString(unsigned val, bool HasV8) { in MemBOptToString() argument 82 case LD: return HasV8 ? "ld" : "#0xd"; in MemBOptToString() 86 case ISHLD: return HasV8 ? "ishld" : "#0x9"; in MemBOptToString() 90 case NSHLD: return HasV8 ? "nshld" : "#0x5"; in MemBOptToString() 94 case OSHLD: return HasV8 ? "oshld" : "#0x1"; in MemBOptToString()
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 141 inline static const char *MemBOptToString(unsigned val, bool HasV8) { in MemBOptToString() argument 146 case LD: return HasV8 ? "ld" : "#0xd"; in MemBOptToString() 150 case ISHLD: return HasV8 ? "ishld" : "#0x9"; in MemBOptToString() 154 case NSHLD: return HasV8 ? "nshld" : "#0x5"; in MemBOptToString() 158 case OSHLD: return HasV8 ? "oshld" : "#0x1"; in MemBOptToString()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMScheduleM4.td | 22 IsNotMClass, HasDPVFP, HasFPARMv8, HasFullFP16, Has8MSecExt, HasV8,
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D | ARMPredicates.td | 58 def HasV8 : Predicate<"Subtarget->hasV8Ops()">,
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D | ARMInstrNEON.td | 4443 Requires<[HasV8, HasCrypto]>; 5627 Requires<[HasV8, HasNEON]>; 5631 Requires<[HasV8, HasNEON]>; 5635 Requires<[HasV8, HasNEON, HasFullFP16]>; 5639 Requires<[HasV8, HasNEON, HasFullFP16]>; 5669 Requires<[HasV8, HasNEON]>; 5673 Requires<[HasV8, HasNEON]>; 5677 Requires<[HasV8, HasNEON, HasFullFP16]>; 5681 Requires<[HasV8, HasNEON, HasFullFP16]>; 6677 "s32.f32", v2i32, v2f32, IntS>, Requires<[HasV8, HasNEON]>; [all …]
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D | ARMInstrThumb.td | 337 let Predicates = [IsThumb2, HasV8]; 354 []>, T1Encoding<0b101110>, Requires<[IsThumb, HasV8]> {
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D | ARMInstrThumb2.td | 3262 Requires<[IsThumb2, HasV8, HasCRC]> { 3961 let Predicates = [IsThumb2, HasV8]; 3996 : T2I<(outs), (ins), NoItinerary, opc, "", []>, Requires<[IsThumb2, HasV8]> { 4563 T1Misc<0b0110000>, Requires<[IsThumb2, HasV8, HasV8_1a]> {
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D | ARMInstrInfo.td | 2059 def : InstAlias<"sevl$p", (HINT 5, pred:$p)>, Requires<[IsARM, HasV8]>; 2094 "hlt", "\t$val", []>, Requires<[IsARM, HasV8]> { 4629 Requires<[IsARM, HasV8, HasCRC]> { 4662 "\t$imm", []>, Requires<[IsARM, HasV8, HasV8_1a]> {
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMScheduleM4.td | 22 IsNotMClass, HasDPVFP, HasFPARMv8, HasFullFP16, Has8MSecExt, HasV8,
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D | ARMPredicates.td | 64 def HasV8 : Predicate<"Subtarget->hasV8Ops()">,
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D | ARMInstrNEON.td | 4374 Requires<[HasV8, HasCrypto]>; 5625 Requires<[HasV8, HasNEON]>; 5629 Requires<[HasV8, HasNEON]>; 5633 Requires<[HasV8, HasNEON, HasFullFP16]>; 5637 Requires<[HasV8, HasNEON, HasFullFP16]>; 5667 Requires<[HasV8, HasNEON]>; 5671 Requires<[HasV8, HasNEON]>; 5675 Requires<[HasV8, HasNEON, HasFullFP16]>; 5679 Requires<[HasV8, HasNEON, HasFullFP16]>; 6728 "s32.f32", v2i32, v2f32, IntS>, Requires<[HasV8, HasNEON]>; [all …]
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D | ARMInstrThumb.td | 341 let Predicates = [IsThumb2, HasV8]; 358 []>, T1Encoding<0b101110>, Requires<[IsThumb, HasV8]> {
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D | ARMInstrThumb2.td | 3331 Requires<[IsThumb2, HasV8, HasCRC]> { 4030 let Predicates = [IsThumb2, HasV8]; 4065 : T2I<(outs), (ins), NoItinerary, opc, "", []>, Requires<[IsThumb2, HasV8]> { 4632 T1Misc<0b0110000>, Requires<[IsThumb2, HasV8, HasV8_1a]> {
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D | ARMInstrInfo.td | 2174 def : InstAlias<"sevl$p", (HINT 5, pred:$p)>, Requires<[IsARM, HasV8]>; 2209 "hlt", "\t$val", []>, Requires<[IsARM, HasV8]> { 4779 Requires<[IsARM, HasV8, HasCRC]> { 4812 "\t$imm", []>, Requires<[IsARM, HasV8, HasV8_1a]> {
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 4284 Requires<[HasV8, HasCrypto]>; 5206 Requires<[HasV8, HasNEON]>; 5210 Requires<[HasV8, HasNEON]>; 5214 Requires<[HasV8, HasNEON, HasFullFP16]>; 5218 Requires<[HasV8, HasNEON, HasFullFP16]>; 5248 Requires<[HasV8, HasNEON]>; 5252 Requires<[HasV8, HasNEON]>; 5256 Requires<[HasV8, HasNEON, HasFullFP16]>; 5260 Requires<[HasV8, HasNEON, HasFullFP16]>; 6145 "s32.f32", v2i32, v2f32, IntS>, Requires<[HasV8, HasNEON]>; [all …]
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D | ARMInstrThumb.td | 308 let Predicates = [IsThumb2, HasV8]; 325 []>, T1Encoding<0b101110>, Requires<[IsThumb, HasV8]> {
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D | ARMInstrInfo.td | 214 def HasV8 : Predicate<"Subtarget->hasV8Ops()">, 1917 def : InstAlias<"sevl$p", (HINT 5, pred:$p)>, Requires<[IsARM, HasV8]>; 1949 "hlt", "\t$val", []>, Requires<[IsARM, HasV8]> { 4308 Requires<[IsARM, HasV8, HasCRC]> { 4341 "\t$imm", []>, Requires<[IsARM, HasV8, HasV8_1a]> {
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D | ARMInstrThumb2.td | 3053 Requires<[IsThumb2, HasV8, HasCRC]> { 3733 let Predicates = [IsThumb2, HasV8]; 3765 : T2I<(outs), (ins), NoItinerary, opc, "", []>, Requires<[IsThumb2, HasV8]> { 4323 T1Misc<0b0110000>, Requires<[IsThumb2, HasV8, HasV8_1a]> {
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