| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 294 INSERT_SUBVECTOR, enumerator
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| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 749 ISD::INSERT_SUBVECTOR, 0),
751 ISD::INSERT_SUBVECTOR, 0),
753 ISD::INSERT_SUBVECTOR, 0),
755 ISD::INSERT_SUBVECTOR, 0),
757 ISD::INSERT_SUBVECTOR, 0),
759 ISD::INSERT_SUBVECTOR, 0),
761 ISD::INSERT_SUBVECTOR, 0),
763 ISD::INSERT_SUBVECTOR, 0),
765 ISD::INSERT_SUBVECTOR, 0),
767 ISD::INSERT_SUBVECTOR, 0),
[all …]
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| D | X86ISelLowering.cpp | 662 setOperationAction(ISD::INSERT_SUBVECTOR, VT,Expand); in X86TargetLowering()
1111 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1301 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v16i1, Custom); in X86TargetLowering()
1401 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1436 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i1, Custom); in X86TargetLowering()
1437 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i1, Custom); in X86TargetLowering()
1438 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i16, Custom); in X86TargetLowering()
1439 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i8, Custom); in X86TargetLowering()
1540 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i1, Custom); in X86TargetLowering()
1541 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4i1, Custom); in X86TargetLowering()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 407 INSERT_SUBVECTOR, enumerator
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| /external/llvm-project/llvm/test/Transforms/InstCombine/ |
| D | canonicalize-vector-insert.ll | 5 ; scalable case, we lower to the INSERT_SUBVECTOR ISD node.
139 ; INSERT_SUBVECTOR ISD node later.
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 527 INSERT_SUBVECTOR, enumerator
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | sve-fixed-length-subvector.ll | 23 ; scalable_vector = ISD::INSERT_SUBVECTOR scalable_vector, fixed_length_vector, 0
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 221 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; in getOperationName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 781 setOperationAction(ISD::INSERT_SUBVECTOR, VT,Expand); in X86TargetLowering()
1350 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Legal); in X86TargetLowering()
1432 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1620 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Legal); in X86TargetLowering()
1753 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i1, Custom); in X86TargetLowering()
1754 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i1, Custom); in X86TargetLowering()
1784 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i16, Legal); in X86TargetLowering()
1785 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i8, Legal); in X86TargetLowering()
1988 setTargetDAGCombine(ISD::INSERT_SUBVECTOR); in X86TargetLowering()
5685 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 97 setOperationAction(ISD::INSERT_SUBVECTOR, T, Custom); in initializeHVXLowering()
188 setOperationAction(ISD::INSERT_SUBVECTOR, BoolV, Custom); in initializeHVXLowering()
1565 case ISD::INSERT_SUBVECTOR: return LowerHvxInsertSubvector(Op, DAG); in LowerHvxOperation()
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| D | HexagonISelLowering.cpp | 1492 ISD::EXTRACT_SUBVECTOR, ISD::INSERT_SUBVECTOR, in HexagonTargetLowering()
1541 setOperationAction(ISD::INSERT_SUBVECTOR, NativeVT, Custom); in HexagonTargetLowering()
2904 case ISD::INSERT_SUBVECTOR: return LowerINSERT_SUBVECTOR(Op, DAG); in LowerOperation()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 790 setOperationAction(ISD::INSERT_SUBVECTOR, VT,Expand); in X86TargetLowering()
1378 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Legal); in X86TargetLowering()
1464 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1686 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Legal); in X86TargetLowering()
1846 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1975 setTargetDAGCombine(ISD::INSERT_SUBVECTOR); in X86TargetLowering()
5876 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); in insertSubVector()
5901 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, VT, Res, Vec, in widenSubVector()
5930 if (N->getOpcode() == ISD::INSERT_SUBVECTOR) { in collectConcatOps()
5941 if (Src.getOpcode() == ISD::INSERT_SUBVECTOR && in collectConcatOps()
[all …]
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| D | X86ISelDAGToDAG.cpp | 706 if (Root->getOpcode() == ISD::INSERT_SUBVECTOR && in IsProfitableToFold()
920 CurDAG->getNode(ISD::INSERT_SUBVECTOR, dl, VT, CurDAG->getUNDEF(VT), in PreprocessISelDAG()
923 Res = CurDAG->getNode(ISD::INSERT_SUBVECTOR, dl, VT, Res, NarrowBCast, in PreprocessISelDAG()
948 CurDAG->getNode(ISD::INSERT_SUBVECTOR, dl, VT, CurDAG->getUNDEF(VT), in PreprocessISelDAG()
951 Res = CurDAG->getNode(ISD::INSERT_SUBVECTOR, dl, VT, Res, NarrowBCast, in PreprocessISelDAG()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 991 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandANY_EXTEND_VECTOR_INREG()
1050 Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), in ExpandZERO_EXTEND_VECTOR_INREG()
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| D | SelectionDAGDumper.cpp | 287 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 890 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break; in SplitVectorResult()
1244 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx); in SplitVecRes_INSERT_SUBVECTOR()
3349 ISD::INSERT_SUBVECTOR, DL, WideResVT, DAG.getUNDEF(WideResVT), in WidenVecRes_OverflowOp()
3352 ISD::INSERT_SUBVECTOR, DL, WideResVT, DAG.getUNDEF(WideResVT), in WidenVecRes_OverflowOp()
4459 InOp = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, FixedVT, in WidenVecOp_EXTEND()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 283 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 1091 ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), Src, in ExpandANY_EXTEND_VECTOR_INREG()
1151 ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), Src, in ExpandZERO_EXTEND_VECTOR_INREG()
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| D | DAGCombiner.cpp | 1605 case ISD::INSERT_SUBVECTOR: return visitINSERT_SUBVECTOR(N); in visit()
17488 VecIn2 = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, InVT1, in createBuildVecShuffle()
18283 if (V.getOpcode() == ISD::INSERT_SUBVECTOR && in getSubVectorSrc()
18628 if (V.getOpcode() == ISD::INSERT_SUBVECTOR) { in visitEXTRACT_SUBVECTOR()
19610 SDValue NewINSERT = DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), in visitINSERT_SUBVECTOR()
19619 if (N0.getOpcode() == ISD::INSERT_SUBVECTOR && in visitINSERT_SUBVECTOR()
19622 return DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), VT, N0.getOperand(0), in visitINSERT_SUBVECTOR()
19628 if (N0.isUndef() && N1.getOpcode() == ISD::INSERT_SUBVECTOR && in visitINSERT_SUBVECTOR()
19630 return DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), VT, N0, in visitINSERT_SUBVECTOR()
19667 if (NewIdx && hasOperation(ISD::INSERT_SUBVECTOR, NewVT)) { in visitINSERT_SUBVECTOR()
[all …]
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| D | LegalizeVectorTypes.cpp | 834 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break; in SplitVectorResult()
1147 Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx); in SplitVecRes_INSERT_SUBVECTOR()
3196 ISD::INSERT_SUBVECTOR, DL, WideResVT, DAG.getUNDEF(WideResVT), in WidenVecRes_OverflowOp()
3199 ISD::INSERT_SUBVECTOR, DL, WideResVT, DAG.getUNDEF(WideResVT), in WidenVecRes_OverflowOp()
4292 ISD::INSERT_SUBVECTOR, DL, FixedVT, DAG.getUNDEF(FixedVT), InOp, in WidenVecOp_EXTEND()
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 121 setOperationAction(ISD::INSERT_SUBVECTOR, T, Custom); in initializeHVXLowering()
225 setOperationAction(ISD::INSERT_SUBVECTOR, BoolV, Custom); in initializeHVXLowering()
2065 case ISD::INSERT_SUBVECTOR: return LowerHvxInsertSubvector(Op, DAG); in LowerHvxOperation()
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| D | HexagonISelLowering.cpp | 1625 ISD::EXTRACT_SUBVECTOR, ISD::INSERT_SUBVECTOR, in HexagonTargetLowering()
1675 setOperationAction(ISD::INSERT_SUBVECTOR, NativeVT, Custom); in HexagonTargetLowering()
3074 case ISD::INSERT_SUBVECTOR: return LowerINSERT_SUBVECTOR(Op, DAG); in LowerOperation()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 272 case ISD::INSERT_SUBVECTOR: in SITargetLowering()
338 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v3i32, Custom); in SITargetLowering()
339 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v3f32, Custom); in SITargetLowering()
340 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4i32, Custom); in SITargetLowering()
341 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4f32, Custom); in SITargetLowering()
344 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v5i32, Custom); in SITargetLowering()
345 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v5f32, Custom); in SITargetLowering()
346 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i32, Custom); in SITargetLowering()
347 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8f32, Custom); in SITargetLowering()
534 case ISD::INSERT_SUBVECTOR: in SITargetLowering()
[all …]
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 304 case ISD::INSERT_SUBVECTOR: in SITargetLowering()
412 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v3i32, Custom); in SITargetLowering()
413 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v3f32, Custom); in SITargetLowering()
414 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4i32, Custom); in SITargetLowering()
415 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4f32, Custom); in SITargetLowering()
418 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v5i32, Custom); in SITargetLowering()
419 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v5f32, Custom); in SITargetLowering()
420 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i32, Custom); in SITargetLowering()
421 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8f32, Custom); in SITargetLowering()
626 case ISD::INSERT_SUBVECTOR: in SITargetLowering()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1955 ISD::EXTRACT_SUBVECTOR, ISD::INSERT_SUBVECTOR, in HexagonTargetLowering()
1982 setOperationAction(ISD::INSERT_SUBVECTOR, NativeVT, Custom); in HexagonTargetLowering()
2771 case ISD::INSERT_SUBVECTOR: return LowerINSERT_VECTOR(Op, DAG); in LowerOperation()
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