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Searched refs:ISL_TILING_LINEAR (Results 1 – 18 of 18) sorted by relevance

/external/mesa3d/src/intel/isl/
Disl_drm.c37 case ISL_TILING_LINEAR: in isl_tiling_to_i915_tiling()
63 return ISL_TILING_LINEAR; in isl_tiling_from_i915_tiling()
79 .tiling = ISL_TILING_LINEAR,
Disl_gen6.c59 if (tiling == ISL_TILING_LINEAR) in isl_gen6_choose_msaa_layout()
Disl.c315 if (tiling != ISL_TILING_LINEAR && !isl_is_pow2(format_bpb)) { in isl_tiling_get_info()
328 case ISL_TILING_LINEAR: in isl_tiling_get_info()
545 CHOOSE(ISL_TILING_LINEAR); in isl_surf_choose_tiling()
553 CHOOSE(ISL_TILING_LINEAR); in isl_surf_choose_tiling()
818 if (tiling == ISL_TILING_LINEAR) in isl_surf_choose_dim_layout()
1078 tile_info->tiling != ISL_TILING_LINEAR) { in isl_calc_array_pitch_el_rows_gen4_2d()
1411 if (tile_info->tiling != ISL_TILING_LINEAR) { in isl_calc_row_pitch_alignment()
1515 if (tile_info->tiling == ISL_TILING_LINEAR) { in isl_calc_min_row_pitch()
1665 if (tiling == ISL_TILING_LINEAR) { in isl_surf_init_s()
1998 if (surf->tiling == ISL_TILING_LINEAR) in isl_surf_supports_ccs()
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Disl_surface_state.c70 [ISL_TILING_LINEAR] = LINEAR,
497 s.TiledSurface = info->surf->tiling != ISL_TILING_LINEAR, in isl_genX()
556 assert(info->surf->tiling != ISL_TILING_LINEAR); in isl_genX()
Disl_gen7.c112 if (tiling == ISL_TILING_LINEAR) in isl_gen7_choose_msaa_layout()
Disl_storage_image.c265 case ISL_TILING_LINEAR: in isl_surf_fill_image_param()
Disl_emit_depth_stencil.c119 db.TiledSurface = info->depth_surf->tiling != ISL_TILING_LINEAR; in isl_genX()
Disl.h471 ISL_TILING_LINEAR = 0, enumerator
487 #define ISL_TILING_LINEAR_BIT (1u << ISL_TILING_LINEAR)
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_blit.c176 if (mt->surf.tiling == ISL_TILING_LINEAR) { in get_blit_intratile_offset_el()
203 if (tiling != ISL_TILING_LINEAR) in alignment_valid()
232 if (dst_tiling != ISL_TILING_LINEAR) in xy_blit_cmd()
235 if (src_tiling != ISL_TILING_LINEAR) in xy_blit_cmd()
295 assert(src_tiling == ISL_TILING_LINEAR || (src_pitch % src_tile_w) == 0); in emit_copy_blit()
296 assert(dst_tiling == ISL_TILING_LINEAR || (dst_pitch % dst_tile_w) == 0); in emit_copy_blit()
336 if (dst_tiling != ISL_TILING_LINEAR) in emit_copy_blit()
339 if (src_tiling != ISL_TILING_LINEAR) in emit_copy_blit()
637 if (dst_tiling != ISL_TILING_LINEAR) { in intelEmitImmediateColorExpandBlit()
661 if (dst_tiling != ISL_TILING_LINEAR) { in intelEmitImmediateColorExpandBlit()
[all …]
Dintel_pixel_draw.c121 ISL_TILING_LINEAR, in do_blit_drawpixels()
Dintel_mipmap_tree.c319 if (tiling == ISL_TILING_LINEAR) in need_to_retile_as_linear()
406 init_info.tiling_flags = 1u << ISL_TILING_LINEAR; in make_surface()
420 if (mt->surf.tiling != ISL_TILING_LINEAR) in make_surface()
628 if (tiling != ISL_TILING_LINEAR) in intel_miptree_create_for_bo()
1178 case ISL_TILING_LINEAR: in intel_get_tile_dims()
1220 case ISL_TILING_LINEAR: in intel_miptree_get_aligned_offset()
3106 if (mt->surf.tiling != ISL_TILING_LINEAR && in use_intel_mipree_map_blit()
3157 } else if (mt->surf.tiling != ISL_TILING_LINEAR && devinfo->gen > 4) { in intel_miptree_map()
3166 if (mt->surf.tiling != ISL_TILING_LINEAR) in intel_miptree_map()
3232 return (devinfo->gen >= 9 && tiling == ISL_TILING_LINEAR ? in get_isl_dim_layout()
Dintel_mipmap_tree.h714 if (mt->surf.tiling != ISL_TILING_LINEAR) in intel_miptree_blt_pitch()
Dbrw_misc_state.c286 tiled_surface = depth_mt->surf.tiling != ISL_TILING_LINEAR; in brw_emit_depth_stencil_hiz()
Dbrw_blorp.c1007 ISL_TILING_LINEAR, 0); in brw_blorp_upload_miptree()
1122 ISL_TILING_LINEAR, 0); in brw_blorp_download_miptree()
/external/mesa3d/src/gallium/drivers/iris/
Diris_resource.c317 return (devinfo->gen >= 9 && tiling == ISL_TILING_LINEAR ? in iris_get_isl_dim_layout()
867 res->surf.tiling = ISL_TILING_LINEAR; in iris_resource_create_for_buffer()
1478 case ISL_TILING_LINEAR: in iris_resource_get_tile_dims()
1521 case ISL_TILING_LINEAR: in iris_resource_get_aligned_offset()
1874 if (surf->tiling != ISL_TILING_LINEAR && in iris_transfer_map()
1959 } else if (surf->tiling != ISL_TILING_LINEAR) { in iris_transfer_map()
2067 if (surf->tiling == ISL_TILING_LINEAR || in iris_texture_subdata()
/external/mesa3d/src/intel/vulkan/
Danv_image.c1171 assert(surface->isl.tiling == ISL_TILING_LINEAR); in anv_GetImageSubresourceLayout()
1392 assert(image->planes[plane].surface.isl.tiling != ISL_TILING_LINEAR); in anv_layout_to_aux_state()
1742 assert(surface->isl.tiling == ISL_TILING_LINEAR); in anv_image_fill_surface_state()
1743 assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR); in anv_image_fill_surface_state()
1851 assert(surface->isl.tiling == ISL_TILING_LINEAR); in anv_image_fill_surface_state()
DgenX_cmd_buffer.c1155 assert(image->planes[plane].surface.isl.tiling == ISL_TILING_LINEAR); in transition_color_buffer()
1156 assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR); in transition_color_buffer()
1168 assert(image->planes[plane].surface.isl.tiling != ISL_TILING_LINEAR); in transition_color_buffer()
/external/mesa3d/src/intel/blorp/
Dblorp_clear.c428 if (surf->surf->tiling == ISL_TILING_LINEAR) in blorp_clear()
522 assert(params.dst.surf.tiling == ISL_TILING_LINEAR); in blorp_clear()