1 /*
2 * Copyright 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "isl_gen6.h"
25 #include "isl_priv.h"
26
27 bool
isl_gen6_choose_msaa_layout(const struct isl_device * dev,const struct isl_surf_init_info * info,enum isl_tiling tiling,enum isl_msaa_layout * msaa_layout)28 isl_gen6_choose_msaa_layout(const struct isl_device *dev,
29 const struct isl_surf_init_info *info,
30 enum isl_tiling tiling,
31 enum isl_msaa_layout *msaa_layout)
32 {
33 assert(ISL_DEV_GEN(dev) == 6);
34 assert(info->samples >= 1);
35
36 if (info->samples == 1) {
37 *msaa_layout = ISL_MSAA_LAYOUT_NONE;
38 return true;
39 }
40
41 if (!isl_format_supports_multisampling(dev->info, info->format))
42 return false;
43
44 /* From the Sandybridge PRM, Volume 4 Part 1 p85, SURFACE_STATE, Number of
45 * Multisamples:
46 *
47 * If this field is any value other than MULTISAMPLECOUNT_1 the
48 * following restrictions apply:
49 *
50 * - the Surface Type must be SURFTYPE_2D
51 * - [...]
52 */
53 if (info->dim != ISL_SURF_DIM_2D)
54 return false;
55
56 /* More obvious restrictions */
57 if (isl_surf_usage_is_display(info->usage))
58 return false;
59 if (tiling == ISL_TILING_LINEAR)
60 return false;
61 if (info->levels > 1)
62 return false;
63
64 *msaa_layout = ISL_MSAA_LAYOUT_INTERLEAVED;
65 return true;
66 }
67
68 void
isl_gen6_choose_image_alignment_el(const struct isl_device * dev,const struct isl_surf_init_info * restrict info,enum isl_tiling tiling,enum isl_dim_layout dim_layout,enum isl_msaa_layout msaa_layout,struct isl_extent3d * image_align_el)69 isl_gen6_choose_image_alignment_el(const struct isl_device *dev,
70 const struct isl_surf_init_info *restrict info,
71 enum isl_tiling tiling,
72 enum isl_dim_layout dim_layout,
73 enum isl_msaa_layout msaa_layout,
74 struct isl_extent3d *image_align_el)
75 {
76 /* Handled by isl_choose_image_alignment_el */
77 assert(info->format != ISL_FORMAT_HIZ);
78
79 /* Note that the surface's horizontal image alignment is not programmable
80 * on Sandybridge.
81 *
82 * From the Sandybridge PRM (2011-05), Volume 1, Part 1, Section 7.18.3.4
83 * Alignment Unit Size:
84 *
85 * Note that the compressed formats are padded to a full compression cell.
86 *
87 * +------------------------+--------+--------+
88 * | format | halign | valign |
89 * +------------------------+--------+--------+
90 * | YUV 4:2:2 formats | 4 | * |
91 * | BC1-5 | 4 | 4 |
92 * | FXT1 | 8 | 4 |
93 * | uncompressed formats | 4 | * |
94 * +------------------------+--------+--------+
95 *
96 * * For these formats, the vertical alignment factor “j” is determined
97 * as follows:
98 * - j = 4 for any depth buffer
99 * - j = 2 for separate stencil buffer
100 * - j = 4 for any render target surface is multisampled (4x)
101 * - j = 2 for all other render target surface
102 *
103 * From the Sandrybridge PRM (2011-05), Volume 4, Part 1, Section 2.11.2
104 * SURFACE_STATE, Surface Vertical Alignment:
105 *
106 * - This field must be set to VALIGN_2 if the Surface Format is 96 bits
107 * per element (BPE).
108 *
109 * - Value of 1 [VALIGN_4] is not supported for format YCRCB_NORMAL
110 * (0x182), YCRCB_SWAPUVY (0x183), YCRCB_SWAPUV (0x18f), YCRCB_SWAPY
111 * (0x190)
112 */
113
114 if (isl_format_is_compressed(info->format)) {
115 /* Compressed formats have an alignment equal to their block size */
116 *image_align_el = isl_extent3d(1, 1, 1);
117 return;
118 }
119
120 /* Separate stencil requires 4x2 alignment */
121 if (isl_surf_usage_is_stencil(info->usage) &&
122 info->format == ISL_FORMAT_R8_UINT) {
123 *image_align_el = isl_extent3d(4, 2, 1);
124 return;
125 }
126
127 /* Depth or combined depth stencil surfaces require 4x4 alignment */
128 if (isl_surf_usage_is_depth_or_stencil(info->usage)) {
129 *image_align_el = isl_extent3d(4, 4, 1);
130 return;
131 }
132
133 if (info->samples > 1) {
134 *image_align_el = isl_extent3d(4, 4, 1);
135 return;
136 }
137
138 /* For everything else, 4x2 is always a valid alignment. Since this is
139 * also the smallest alignment we can specify, we use 4x2 for everything
140 * else because it uses the least memory.
141 */
142 *image_align_el = isl_extent3d(4, 2, 1);
143 }
144