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Searched refs:Imm8 (Results 1 – 25 of 26) sorted by relevance

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/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp936 int32_t Imm8 = MI.getOperand(OpIdx).getImm(); in getT2Imm8s4OpValue() local
937 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue()
940 if (Imm8 < 0) in getT2Imm8s4OpValue()
941 Imm8 = -(uint32_t)Imm8; in getT2Imm8s4OpValue()
944 Imm8 /= 4; in getT2Imm8s4OpValue()
946 uint32_t Binary = Imm8 & 0xff; in getT2Imm8s4OpValue()
962 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local
968 Imm8 = 0; in getT2AddrModeImm8s4OpValue()
978 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI); in getT2AddrModeImm8s4OpValue()
986 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue()
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DARMAddressingModes.h566 unsigned Imm8 = getNEONModImmVal(ModImm); in decodeNEONModImm() local
571 Val = Imm8; in decodeNEONModImm()
576 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
581 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
586 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeNEONModImm()
/external/capstone/arch/ARM/
DARMAddressingModes.h602 unsigned Imm8 = getNEONModImmVal(ModImm); in ARM_AM_decodeNEONModImm() local
608 Val = Imm8; in ARM_AM_decodeNEONModImm()
613 Val = (uint64_t)Imm8 << (8 * ByteNum); in ARM_AM_decodeNEONModImm()
618 Val = (uint64_t)Imm8 << (8 * ByteNum); in ARM_AM_decodeNEONModImm()
623 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in ARM_AM_decodeNEONModImm()
/external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp1111 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local
1117 Imm8 = 0; in getT2AddrModeImm8s4OpValue()
1127 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI); in getT2AddrModeImm8s4OpValue()
1135 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue()
1181 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue() local
1182 return (Reg << 8) | Imm8; in getT2AddrModeImm0_1020s4OpValue()
1323 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OffsetOpValue() local
1326 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OffsetOpValue()
1327 return Imm8 | (isAdd << 8) | (isImm << 9); in getAddrMode3OffsetOpValue()
1359 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OpValue() local
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DARMAddressingModes.h559 unsigned Imm8 = getVMOVModImmVal(ModImm); in decodeVMOVModImm() local
564 Val = Imm8; in decodeVMOVModImm()
569 Val = Imm8 << (8 * ByteNum); in decodeVMOVModImm()
574 Val = Imm8 << (8 * ByteNum); in decodeVMOVModImm()
579 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeVMOVModImm()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h545 unsigned Imm8 = getVMOVModImmVal(ModImm); in decodeVMOVModImm() local
550 Val = Imm8; in decodeVMOVModImm()
555 Val = Imm8 << (8 * ByteNum); in decodeVMOVModImm()
560 Val = Imm8 << (8 * ByteNum); in decodeVMOVModImm()
565 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeVMOVModImm()
DARMMCCodeEmitter.cpp1119 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local
1125 Imm8 = 0; in getT2AddrModeImm8s4OpValue()
1135 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI); in getT2AddrModeImm8s4OpValue()
1143 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue()
1189 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue() local
1190 return (Reg << 8) | Imm8; in getT2AddrModeImm0_1020s4OpValue()
1331 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OffsetOpValue() local
1334 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OffsetOpValue()
1335 return Imm8 | (isAdd << 8) | (isImm << 9); in getAddrMode3OffsetOpValue()
1367 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OpValue() local
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/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h404 Imm8 = 1 << ImmShift, enumerator
577 case X86II::Imm8: in getSizeOfImm()
597 case X86II::Imm8: in isImmPCRel()
613 case X86II::Imm8: in isImmSigned()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrFormats.td87 def Imm8 : ImmType<1>;
399 : X86Inst<o, f, Imm8, outs, ins, asm, d> {
579 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix.
609 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
611 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
613 // PDIi8 - SSE2 instructions with ImmT == Imm8 and PD prefix.
619 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as
621 // MMXSSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix as well as
721 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8.
756 // AVXAIi8 - AVX instructions with TAPD prefix and ImmT = Imm8.
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DX86InstrArithmetic.td565 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
608 Imm8, i8imm, imm_su, i8imm, invalid_node,
771 let ImmT = Imm8; // Always 8-bit immediate.
865 let ImmT = Imm8; // Always 8-bit immediate.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFormats.td80 def Imm8 : ImmType<1>;
386 : X86Inst<o, f, Imm8, outs, ins, asm, d> {
566 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix.
596 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
598 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
600 // PDIi8 - SSE2 instructions with ImmT == Imm8 and PD prefix.
606 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as
608 // MMXSSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix as well as
708 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8.
743 // AVXAIi8 - AVX instructions with TAPD prefix and ImmT = Imm8.
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DX86InstrArithmetic.td565 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
608 Imm8, i8imm, relocImm8_su, i8imm, invalid_node,
771 let ImmT = Imm8; // Always 8-bit immediate.
865 let ImmT = Imm8; // Always 8-bit immediate.
/external/llvm/lib/Target/X86/
DX86InstrFormats.td66 def Imm8 : ImmType<1>;
350 : X86Inst<o, f, Imm8, outs, ins, asm, itin, d> {
519 // PSIi8 - SSE1 instructions with ImmT == Imm8 and PS prefix.
549 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
551 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
553 // PDIi8 - SSE2 instructions with ImmT == Imm8 and PD prefix.
559 // MMXSDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix as well as
561 // MMXSSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix as well as
661 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8.
696 // AVXAIi8 - AVX instructions with TAPD prefix and ImmT = Imm8.
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DX86InstrArithmetic.td576 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
619 Imm8, i8imm, imm8_su, i8imm, invalid_node,
797 let ImmT = Imm8; // Always 8-bit immediate.
892 let ImmT = Imm8; // Always 8-bit immediate.
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp220 IValueT &Cmode, IValueT &Imm8) { in encodeAdvSIMDExpandImm() argument
225 Imm8 = Value; in encodeAdvSIMDExpandImm()
436 IValueT encodeImmRegOffsetEnc3(IValueT Rn, IOffsetT Imm8, in encodeImmRegOffsetEnc3() argument
439 if (Imm8 < 0) { in encodeImmRegOffsetEnc3()
440 Imm8 = -Imm8; in encodeImmRegOffsetEnc3()
443 assert(Imm8 < (1 << 8)); in encodeImmRegOffsetEnc3()
444 Value = Value | B22 | ((Imm8 & 0xf0) << 4) | (Imm8 & 0x0f); in encodeImmRegOffsetEnc3()
858 IValueT Imm8; in emitType01() local
859 if (!OperandARM32FlexImm::canHoldImm(Src1Value, &RotateAmt, &Imm8)) in emitType01()
862 Src1Value = encodeRotatedImm8(RotateAmt, Imm8); in emitType01()
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DIceTargetLoweringARM32.cpp1986 uint32_t Imm8, Rotate; in legalizeMemOperand() local
1990 } else if (OperandARM32FlexImm::canHoldImm(OffsetDiff, &Rotate, &Imm8)) { in legalizeMemOperand()
1992 Target->Func, IceType_i32, Imm8, Rotate); in legalizeMemOperand()
1996 } else if (OperandARM32FlexImm::canHoldImm(-OffsetDiff, &Rotate, &Imm8)) { in legalizeMemOperand()
1998 Target->Func, IceType_i32, Imm8, Rotate); in legalizeMemOperand()
2520 uint32_t Rotate, Imm8; in immediateIsFlexEncodable() local
2521 return OperandARM32FlexImm::canHoldImm(getConstantValue(), &Rotate, &Imm8); in immediateIsFlexEncodable()
2525 uint32_t Rotate, Imm8; in negatedImmediateIsFlexEncodable() local
2527 -static_cast<int32_t>(getConstantValue()), &Rotate, &Imm8); in negatedImmediateIsFlexEncodable()
2537 uint32_t Rotate, Imm8; in invertedImmediateIsFlexEncodable() local
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DIceInstARM32.cpp378 uint32_t Imm8 = Utils::rotateLeft32(Immediate, 2 * Rot); in canHoldImm() local
379 if (Imm8 <= 0xFF) { in canHoldImm()
381 *Immed_8 = Imm8; in canHoldImm()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h779 Imm8 = 1 << ImmShift, enumerator
918 case X86II::Imm8: in getSizeOfImm()
939 case X86II::Imm8: in isImmPCRel()
956 case X86II::Imm8: in isImmSigned()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h834 Imm8 = 1 << ImmShift, enumerator
987 case X86II::Imm8: in getSizeOfImm()
1008 case X86II::Imm8: in isImmPCRel()
1025 case X86II::Imm8: in isImmSigned()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp7801 unsigned Imm8 = Inst.getOperand(0).getImm(); in validateInstruction() local
7805 if (Imm8 == 0x10 && Pred != ARMCC::AL && hasRAS()) in validateInstruction()
7809 if (Imm8 == 0x14 && Pred != ARMCC::AL) in validateInstruction()
/external/llvm-project/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp7976 unsigned Imm8 = Inst.getOperand(0).getImm(); in validateInstruction() local
7980 if (Imm8 == 0x10 && Pred != ARMCC::AL && hasRAS()) in validateInstruction()
7984 if (Imm8 == 0x14 && Pred != ARMCC::AL) in validateInstruction()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp6551 unsigned Imm8 = Inst.getOperand(0).getImm(); in validateInstruction() local
6553 if (Imm8 == 0x10 && Pred != ARMCC::AL) in validateInstruction()
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td646 def Imm8AsmOperand: ImmAsmOperand { let Name = "Imm8"; }
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrInfo.td857 def Imm8AsmOperand: ImmAsmOperand<8,8> { let Name = "Imm8"; }
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrInfo.td742 def Imm8AsmOperand: ImmAsmOperand<8,8> { let Name = "Imm8"; }

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