Searched refs:Imm8Reg (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 781 Imm8Reg = 3 << ImmShift, enumerator
920 case X86II::Imm8Reg: return 1; in getSizeOfImm()
940 case X86II::Imm8Reg: in isImmPCRel()
958 case X86II::Imm8Reg: in isImmSigned()
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| D | X86MCCodeEmitter.cpp | 1399 bool HasVEX_I8Reg = (TSFlags & X86II::ImmMask) == X86II::Imm8Reg; in encodeInstruction()
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| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 836 Imm8Reg = 3 << ImmShift, enumerator
989 case X86II::Imm8Reg: return 1; in getSizeOfImm()
1009 case X86II::Imm8Reg: in isImmPCRel()
1027 case X86II::Imm8Reg: in isImmSigned()
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| D | X86MCCodeEmitter.cpp | 1415 bool HasVEX_I8Reg = (TSFlags & X86II::ImmMask) == X86II::Imm8Reg; in encodeInstruction()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 89 def Imm8Reg : ImmType<3>; // Register encoded in [7:4].
405 : X86Inst<o, f, Imm8Reg, outs, ins, asm, d> {
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 82 def Imm8Reg : ImmType<3>; // Register encoded in [7:4].
392 : X86Inst<o, f, Imm8Reg, outs, ins, asm, d> {
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