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Searched refs:ImmOp (Results 1 – 25 of 99) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp90 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
92 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
94 const MachineOperand &ImmOp, unsigned ImmOpNum);
304 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
323 MIB.addOperand(ImmOp); in changeLoad()
331 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
332 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
334 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
348 MIB.addOperand(ImmOp); in changeLoad()
362 bool HexagonOptAddrMode::changeStore(MachineInstr *OldMI, MachineOperand ImmOp, in changeStore() argument
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DHexagonInstrInfoV4.td1260 Operand ImmOp, bits<2>MajOp>
1262 (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
1342 Operand ImmOp, Operand predImmOp, bits<2> MajOp> {
1345 def S2_#NAME#new_io : T_store_io_nv <mnemonic, RC, ImmOp, MajOp>;
1411 class T_StorePI_nv <string mnemonic, Operand ImmOp, bits<2> MajOp >
1413 (ins IntRegs:$src1, ImmOp:$offset, IntRegs:$src2),
1422 string ImmOpStr = !cast<string>(ImmOp);
1444 class T_StorePI_nv_pred <string mnemonic, Operand ImmOp,
1448 ImmOp:$offset, IntRegs:$src3),
1459 string ImmOpStr = !cast<string>(ImmOp);
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DHexagonInstrInfoV60.td121 class T_vstore_ai <string mnemonic, string baseOp, Operand ImmOp,
123 : V6_STInst <(outs), (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
161 class T_vstore_new_ai <string baseOp, Operand ImmOp, RegisterClass RC, bit isNT>
162 : V6_STInst <(outs ), (ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
190 class T_vstore_pred_ai <string mnemonic, string baseOp, Operand ImmOp,
193 (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
252 class T_vstore_qpred_ai <Operand ImmOp, RegisterClass RC,
255 (ins VecPredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
291 class T_vstore_new_pred_ai <string baseOp, Operand ImmOp, RegisterClass RC,
294 (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$src3, RC:$src4),
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DHexagonInstrInfo.td68 class T_CMP <string mnemonic, bits<2> MajOp, bit isNot, Operand ImmOp>
70 (ins IntRegs:$src1, ImmOp:$src2),
1638 Operand ImmOp>
1639 : LDInst<(outs RC:$dst), (ins IntRegs:$src1, ImmOp:$offset),
1647 string ImmOpStr = !cast<string>(ImmOp);
1670 Operand ImmOp, bit isNot, bit isPredNew>
1672 (ins PredRegs:$src1, IntRegs:$src2, ImmOp:$offset),
1682 string ImmOpStr = !cast<string>(ImmOp);
1712 Operand ImmOp, Operand predImmOp, bits<4>MajOp> {
1715 def L2_#NAME#_io : T_load_io <mnemonic, RC, MajOp, ImmOp>;
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/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp107 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
109 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
111 const MachineOperand &ImmOp, unsigned ImmOpNum);
413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
425 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
483 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
502 MIB.add(ImmOp); in changeLoad()
511 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
512 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
514 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp107 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
109 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
111 const MachineOperand &ImmOp, unsigned ImmOpNum);
413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
425 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
483 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
502 MIB.add(ImmOp); in changeLoad()
511 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
512 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
514 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
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/external/llvm-project/llvm/lib/Target/VE/
DVEInstrPatternsVec.td18 multiclass vbrd_elem32<ValueType v32, ValueType s32, SDPatternOperator ImmOp, SDNodeXForm ImmCast, …
20 def : Pat<(v32 (vec_broadcast (s32 ImmOp:$sy), i32:$vl)),
33 multiclass vbrd_elem64<ValueType v64, ValueType s64, SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
35 def : Pat<(v64 (vec_broadcast (s64 ImmOp:$sy), i32:$vl)),
DVVPInstrPatternsVec.td24 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVMergeBaseOffset.cpp244 MachineOperand &ImmOp = LoADDI.getOperand(2); in detectAndFoldOffset() local
245 ImmOp.setOffset(Offset); in detectAndFoldOffset()
246 Tail.addOperand(ImmOp); in detectAndFoldOffset()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVMergeBaseOffset.cpp246 MachineOperand &ImmOp = LoADDI.getOperand(2); in detectAndFoldOffset() local
247 ImmOp.setOffset(Offset); in detectAndFoldOffset()
248 Tail.addOperand(ImmOp); in detectAndFoldOffset()
/external/llvm-project/llvm/lib/CodeGen/
DMachineDebugify.cpp128 auto ImmOp = MachineOperand::CreateImm(NextImm++); in applyDebugifyMetadataToMachineFunction() local
130 /*IsIndirect=*/false, ImmOp, LocalVar, Expr); in applyDebugifyMetadataToMachineFunction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFMISimplifyPatchable.cpp120 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
121 if (!ImmOp.isImm() || ImmOp.getImm() != 0) in checkADDrr()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallFrameOptimization.cpp291 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
292 return ImmOp.getImm() == 0 ? Convert : Exit; in classifyInstruction()
297 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
298 return ImmOp.getImm() == -1 ? Convert : Exit; in classifyInstruction()
/external/llvm-project/llvm/lib/Target/X86/
DX86CallFrameOptimization.cpp291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
292 return ImmOp.getImm() == 0 ? Convert : Exit; in classifyInstruction()
297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
298 return ImmOp.getImm() == -1 ? Convert : Exit; in classifyInstruction()
/external/llvm-project/llvm/lib/Target/BPF/
DBPFMISimplifyPatchable.cpp123 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
124 if (!ImmOp.isImm() || ImmOp.getImm() != 0) in checkADDrr()
/external/llvm-project/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h770 unsigned ImmOp; in getAddSubImmediate() local
773 ImmOp = 2; in getAddSubImmediate()
777 ImmOp = 2; in getAddSubImmediate()
782 ImmOp = 3; in getAddSubImmediate()
788 return Scale * MI.getOperand(ImmOp).getImm(); in getAddSubImmediate()
DThumbRegisterInfo.cpp393 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
400 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
417 ImmOp.ChangeToImmediate(0); in rewriteFrameIndex()
421 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp394 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
401 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
418 ImmOp.ChangeToImmediate(0); in rewriteFrameIndex()
422 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
/external/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp385 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
392 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
409 ImmOp.ChangeToImmediate(0); in rewriteFrameIndex()
413 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
/external/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp282 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
283 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp, TII); in foldOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp882 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
883 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp, TII); in foldOperand()
990 MachineOperand *ImmOp) { in tryConstantFoldOp() argument
994 MI->getOperand(1).ChangeToImmediate(~ImmOp->getImm()); in tryConstantFoldOp()
1389 const MachineOperand *ImmOp = nullptr; in isOMod() local
1393 ImmOp = Src0; in isOMod()
1396 ImmOp = Src1; in isOMod()
1401 int OMod = getOModValue(Op, ImmOp->getImm()); in isOMod()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp909 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
910 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp, TII); in foldOperand()
1031 MachineOperand *ImmOp) { in tryConstantFoldOp() argument
1035 MI->getOperand(1).ChangeToImmediate(~ImmOp->getImm()); in tryConstantFoldOp()
1417 const MachineOperand *ImmOp = nullptr; in isOMod() local
1421 ImmOp = Src0; in isOMod()
1424 ImmOp = Src1; in isOMod()
1429 int OMod = getOModValue(Op, ImmOp->getImm()); in isOMod()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp241 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
242 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp); in SelectInlineAsmMemoryOperand()
284 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/AVR/
DAVRISelDAGToDAG.cpp241 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
242 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp); in SelectInlineAsmMemoryOperand()
281 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/BPF/AsmParser/
DBPFAsmParser.cpp93 struct ImmOp { struct
101 ImmOp Imm;

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