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Searched refs:IntrID (Results 1 – 25 of 38) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
DAMDGPUIntrinsicInfo.cpp32 std::string AMDGPUIntrinsicInfo::getName(unsigned IntrID, Type **Tys, in getName() argument
34 if (IntrID < Intrinsic::num_intrinsics) { in getName()
37 assert(IntrID < AMDGPUIntrinsic::num_AMDGPU_intrinsics && in getName()
40 std::string Result(IntrinsicNameTable[IntrID - Intrinsic::num_intrinsics]); in getName()
71 Function *AMDGPUIntrinsicInfo::getDeclaration(Module *M, unsigned IntrID, in getDeclaration() argument
DAMDGPUPromoteAlloca.cpp316 Intrinsic::ID IntrID = Intrinsic::ID::not_intrinsic; in getWorkitemID() local
320 IntrID = IsAMDGCN ? Intrinsic::amdgcn_workitem_id_x in getWorkitemID()
324 IntrID = IsAMDGCN ? Intrinsic::amdgcn_workitem_id_y in getWorkitemID()
329 IntrID = IsAMDGCN ? Intrinsic::amdgcn_workitem_id_z in getWorkitemID()
336 Function *WorkitemIdFn = Intrinsic::getDeclaration(Mod, IntrID); in getWorkitemID()
/external/llvm-project/llvm/lib/Transforms/Scalar/
DEarlyCSE.cpp663 IntrID = II->getIntrinsicID(); in ParseMemoryInst()
666 if (isHandledNonTargetIntrinsic(IntrID)) { in ParseMemoryInst()
667 switch (IntrID) { in ParseMemoryInst()
697 if (IntrID != 0) in isLoad()
703 if (IntrID != 0) in isStore()
709 if (IntrID != 0) in isAtomic()
715 if (IntrID != 0) in isUnordered()
728 if (IntrID != 0) in isVolatile()
753 if (IntrID != 0) in getMatchingId()
759 if (IntrID != 0) in getPointerOperand()
[all …]
/external/llvm/include/llvm/IR/
DPatternMatch.h1190 IntrinsicID_match(Intrinsic::ID IntrID) : ID(IntrID) {} in IntrinsicID_match()
1229 template <Intrinsic::ID IntrID> inline IntrinsicID_match m_Intrinsic() {
1230 return IntrinsicID_match(IntrID);
1233 template <Intrinsic::ID IntrID, typename T0>
1235 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
1238 template <Intrinsic::ID IntrID, typename T0, typename T1>
1241 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
1244 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2>
1247 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
1250 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2,
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DPatternMatch.h1722 IntrinsicID_match(Intrinsic::ID IntrID) : ID(IntrID) {} in IntrinsicID_match()
1769 template <Intrinsic::ID IntrID> inline IntrinsicID_match m_Intrinsic() {
1770 return IntrinsicID_match(IntrID);
1773 template <Intrinsic::ID IntrID, typename T0>
1775 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
1778 template <Intrinsic::ID IntrID, typename T0, typename T1>
1781 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
1784 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2>
1787 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
1790 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUPromoteAlloca.cpp273 Intrinsic::ID IntrID = Intrinsic::not_intrinsic; in getWorkitemID() local
277 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_x in getWorkitemID()
281 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_y in getWorkitemID()
286 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_z in getWorkitemID()
293 Function *WorkitemIdFn = Intrinsic::getDeclaration(Mod, IntrID); in getWorkitemID()
DAMDGPUISelDAGToDAG.cpp302 void SelectDSAppendConsume(SDNode *N, unsigned IntrID);
303 void SelectDS_GWS(SDNode *N, unsigned IntrID);
2213 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) { in SelectDSAppendConsume() argument
2216 unsigned Opc = IntrID == Intrinsic::amdgcn_ds_append ? in SelectDSAppendConsume()
2253 static unsigned gwsIntrinToOpcode(unsigned IntrID) { in gwsIntrinToOpcode() argument
2254 switch (IntrID) { in gwsIntrinToOpcode()
2272 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) { in SelectDS_GWS() argument
2273 if (IntrID == Intrinsic::amdgcn_ds_gws_sema_release_all && in SelectDS_GWS()
2329 const unsigned Opc = gwsIntrinToOpcode(IntrID); in SelectDS_GWS()
2342 unsigned IntrID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); in SelectINTRINSIC_W_CHAIN() local
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DAMDGPUCodeGenPrepare.cpp480 Intrinsic::ID IntrID = Intrinsic::not_intrinsic; in replaceMulWithMul24() local
484 IntrID = Intrinsic::amdgcn_mul_u24; in replaceMulWithMul24()
486 IntrID = Intrinsic::amdgcn_mul_i24; in replaceMulWithMul24()
498 FunctionCallee Intrin = Intrinsic::getDeclaration(Mod, IntrID); in replaceMulWithMul24()
501 if (IntrID == Intrinsic::amdgcn_mul_u24) { in replaceMulWithMul24()
511 if (IntrID == Intrinsic::amdgcn_mul_u24) { in replaceMulWithMul24()
DAMDGPUTargetTransformInfo.cpp671 auto IntrID = II->getIntrinsicID(); in rewriteIntrinsicWithAddressSpace() local
672 switch (IntrID) { in rewriteIntrinsicWithAddressSpace()
692 unsigned TrueAS = IntrID == Intrinsic::amdgcn_is_shared ? in rewriteIntrinsicWithAddressSpace()
DAMDGPURegisterBankInfo.cpp2141 auto IntrID = MI.getIntrinsicID(); in applyMappingImpl() local
2142 switch (IntrID) { in applyMappingImpl()
2196 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in applyMappingImpl()
3093 auto IntrID = MI.getIntrinsicID(); in getInstrMapping() local
3094 switch (IntrID) { in getInstrMapping()
3255 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in getInstrMapping()
DSIISelLowering.cpp924 unsigned IntrID) const { in getTgtMemIntrinsic()
926 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in getTgtMemIntrinsic()
928 (Intrinsic::ID)IntrID); in getTgtMemIntrinsic()
973 switch (IntrID) { in getTgtMemIntrinsic()
1052 if (IntrID == Intrinsic::amdgcn_ds_gws_barrier) in getTgtMemIntrinsic()
6136 unsigned IntrID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); in LowerINTRINSIC_W_CHAIN() local
6139 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
6169 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
6221 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
6237 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
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/external/llvm-project/llvm/include/llvm/IR/
DPatternMatch.h1974 IntrinsicID_match(Intrinsic::ID IntrID) : ID(IntrID) {} in IntrinsicID_match()
2027 template <Intrinsic::ID IntrID> inline IntrinsicID_match m_Intrinsic() {
2028 return IntrinsicID_match(IntrID);
2031 template <Intrinsic::ID IntrID, typename T0>
2033 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
2036 template <Intrinsic::ID IntrID, typename T0, typename T1>
2039 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
2042 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2>
2045 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
2048 template <Intrinsic::ID IntrID, typename T0, typename T1, typename T2,
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp306 void SelectDSAppendConsume(SDNode *N, unsigned IntrID);
307 void SelectDS_GWS(SDNode *N, unsigned IntrID);
2443 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) { in SelectDSAppendConsume() argument
2446 unsigned Opc = IntrID == Intrinsic::amdgcn_ds_append ? in SelectDSAppendConsume()
2483 static unsigned gwsIntrinToOpcode(unsigned IntrID) { in gwsIntrinToOpcode() argument
2484 switch (IntrID) { in gwsIntrinToOpcode()
2502 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) { in SelectDS_GWS() argument
2503 if (IntrID == Intrinsic::amdgcn_ds_gws_sema_release_all && in SelectDS_GWS()
2556 const unsigned Opc = gwsIntrinToOpcode(IntrID); in SelectDS_GWS()
2626 unsigned IntrID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); in SelectINTRINSIC_W_CHAIN() local
[all …]
DAMDGPUPromoteAlloca.cpp314 Intrinsic::ID IntrID = Intrinsic::not_intrinsic; in getWorkitemID() local
318 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_x in getWorkitemID()
322 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_y in getWorkitemID()
327 IntrID = IsAMDGCN ? (Intrinsic::ID)Intrinsic::amdgcn_workitem_id_z in getWorkitemID()
334 Function *WorkitemIdFn = Intrinsic::getDeclaration(Mod, IntrID); in getWorkitemID()
DAMDGPUCodeGenPrepare.cpp530 Intrinsic::ID IntrID = Intrinsic::not_intrinsic; in replaceMulWithMul24() local
534 IntrID = Intrinsic::amdgcn_mul_u24; in replaceMulWithMul24()
536 IntrID = Intrinsic::amdgcn_mul_i24; in replaceMulWithMul24()
548 FunctionCallee Intrin = Intrinsic::getDeclaration(Mod, IntrID); in replaceMulWithMul24()
551 if (IntrID == Intrinsic::amdgcn_mul_u24) { in replaceMulWithMul24()
561 if (IntrID == Intrinsic::amdgcn_mul_u24) { in replaceMulWithMul24()
DAMDGPUTargetTransformInfo.cpp994 auto IntrID = II->getIntrinsicID(); in rewriteIntrinsicWithAddressSpace() local
995 switch (IntrID) { in rewriteIntrinsicWithAddressSpace()
1015 unsigned TrueAS = IntrID == Intrinsic::amdgcn_is_shared ? in rewriteIntrinsicWithAddressSpace()
DAMDGPULegalizerInfo.cpp3831 static unsigned getBufferAtomicPseudo(Intrinsic::ID IntrID) { in getBufferAtomicPseudo() argument
3832 switch (IntrID) { in getBufferAtomicPseudo()
4599 auto IntrID = MI.getIntrinsicID(); in legalizeIntrinsic() local
4600 switch (IntrID) { in legalizeIntrinsic()
4620 if (IntrID == Intrinsic::amdgcn_if) { in legalizeIntrinsic()
4784 return legalizeBufferAtomic(MI, B, IntrID); in legalizeIntrinsic()
4798 return legalizeDSAtomicFPIntrinsic(Helper, MI, IntrID); in legalizeIntrinsic()
4803 AMDGPU::getImageDimIntrinsicInfo(IntrID)) in legalizeIntrinsic()
DAMDGPURegisterBankInfo.cpp3059 auto IntrID = MI.getIntrinsicID(); in applyMappingImpl() local
3060 switch (IntrID) { in applyMappingImpl()
3101 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in applyMappingImpl()
4239 auto IntrID = MI.getIntrinsicID(); in getInstrMapping() local
4240 const AMDGPU::RsrcIntrinsic *RSrcIntrin = AMDGPU::lookupRsrcIntrinsic(IntrID); in getInstrMapping()
4257 auto IntrID = MI.getIntrinsicID(); in getInstrMapping() local
4258 switch (IntrID) { in getInstrMapping()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineVerifier.cpp1355 unsigned IntrID = IntrIDOp.getIntrinsicID(); in verifyPreISelGenericInstruction() local
1356 if (IntrID != 0 && IntrID < Intrinsic::num_intrinsics) { in verifyPreISelGenericInstruction()
1359 static_cast<Intrinsic::ID>(IntrID)); in verifyPreISelGenericInstruction()
1370 switch (IntrID) { in verifyPreISelGenericInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h664 bool isIntrinsicSourceOfDivergence(unsigned IntrID);
DAMDGPUBaseInfo.cpp1339 bool isIntrinsicSourceOfDivergence(unsigned IntrID) { in isIntrinsicSourceOfDivergence() argument
1340 return lookupSourceOfDivergence(IntrID); in isIntrinsicSourceOfDivergence()
/external/llvm-project/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h746 bool isIntrinsicSourceOfDivergence(unsigned IntrID);
DAMDGPUBaseInfo.cpp1613 bool isIntrinsicSourceOfDivergence(unsigned IntrID) { in isIntrinsicSourceOfDivergence() argument
1614 return lookupSourceOfDivergence(IntrID); in isIntrinsicSourceOfDivergence()
/external/llvm-project/llvm/lib/CodeGen/
DMachineVerifier.cpp1344 unsigned IntrID = IntrIDOp.getIntrinsicID(); in verifyPreISelGenericInstruction() local
1345 if (IntrID != 0 && IntrID < Intrinsic::num_intrinsics) { in verifyPreISelGenericInstruction()
1348 static_cast<Intrinsic::ID>(IntrID)); in verifyPreISelGenericInstruction()
/external/llvm-project/llvm/lib/IR/
DIRBuilder.cpp151 Intrinsic::ID IntrID, Value *Dst, MaybeAlign DstAlign, Value *Src, in CreateMemTransferInst() argument
160 Function *TheFn = Intrinsic::getDeclaration(M, IntrID, Tys); in CreateMemTransferInst()

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