| /external/libtextclassifier/native/utils/grammar/utils/ |
| D | ir.cc | 41 bool IsSameLhs(const Ir::Lhs& lhs, const RulesSet_::Lhs& other) { in IsSameLhs()
48 bool IsSameLhsEntry(const Ir::Lhs& lhs, const int32 lhs_entry, in IsSameLhsEntry()
60 bool IsSameLhsSet(const Ir::LhsSet& lhs_set, in IsSameLhsSet()
77 Ir::LhsSet SortedLhsSet(const Ir::LhsSet& lhs_set) { in SortedLhsSet()
78 Ir::LhsSet sorted_lhs = lhs_set; in SortedLhsSet()
80 [](const Ir::Lhs& a, const Ir::Lhs& b) { in SortedLhsSet()
91 int AddLhsSet(const Ir::LhsSet& lhs_set, RulesSetT* rules_set) { in AddLhsSet()
92 Ir::LhsSet sorted_lhs = SortedLhsSet(lhs_set); in AddLhsSet()
104 for (const Ir::Lhs& lhs : lhs_set) { in AddLhsSet()
139 const std::unordered_map<Nonterm, Ir::LhsSet>& unary_rules, in SerializeUnaryRulesShard()
[all …]
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| D | ir_test.cc | 36 Ir ir(locale_shard_map); in TEST()
79 Ir ir(locale_shard_map); in TEST()
106 Ir ir(locale_shard_map); in TEST()
110 ir.Add(Ir::Lhs{kUnassignedNonterm, {kOutput1, 0}}, "hello"); in TEST()
112 ir.Add(Ir::Lhs{kUnassignedNonterm, {kOutput2, 0}}, "hello"); in TEST()
116 ir.Add(Ir::Lhs{kUnassignedNonterm, {kOutput2, 0}}, "hello"); in TEST()
127 Ir ir(locale_shard_map); in TEST()
131 ir.Add(Ir::Lhs{verb, {kOutput}}, "bring"); in TEST()
169 Ir ir(locale_shard_map); in TEST()
226 Ir ir(locale_shard_map); in TEST()
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| D | rules_test.cc | 41 const Ir ir = rules.Finalize(); in TEST()
65 const Ir ir = rules.Finalize(); in TEST()
88 const Ir ir = rules.Finalize(); in TEST()
110 const Ir ir = rules.Finalize(); in TEST()
128 const Ir ir = rules.Finalize(); in TEST()
158 const Ir ir = rules.Finalize(); in TEST()
178 const Ir ir = rules.Finalize(); in TEST()
201 const Ir ir = rules.Finalize(); in TEST()
226 const Ir ir = rules.Finalize(); in TEST()
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| D | rules.cc | 82 std::unordered_map<int, Nonterm>* nonterminals, Ir* ir) { in LowerRule()
95 ir->Add(Ir::Lhs{GetAssignedIdForNonterminal(lhs_index, *nonterminals), in LowerRule()
106 rhs_nonterms.push_back(ir->Add(Ir::Lhs{kUnassignedNonterm}, in LowerRule()
117 ir->Add(Ir::Lhs{GetAssignedIdForNonterminal(lhs_index, *nonterminals), in LowerRule()
428 Ir Rules::Finalize(const std::set<std::string>& predefined_nonterminals) const { in Finalize()
429 Ir rules(locale_shard_map_); in Finalize()
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| D | ir.h | 52 class Ir {
100 explicit Ir(const LocaleShardMap& locale_shard_map) in Ir() function
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| D | rules.h | 177 Ir Finalize(const std::set<std::string>& predefined_nonterminals = {}) const;
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| /external/harfbuzz_ng/test/shaping/texts/in-house/shaper-use/script-javanese/ |
| D | misc.txt | 54 ꦠꦸꦮꦤ꧀Ir꧇ꦭꦶꦩ꧀ꦆꦁꦲ꧀ꦮꦶ
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| /external/libcups/templates/pt_BR/ |
| D | class.tmpl | 16 <INPUT TYPE="SUBMIT" VALUE="Ir" STYLE="display: none;">
31 <INPUT TYPE="SUBMIT" VALUE="Ir" STYLE="display: none;">
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| D | printer.tmpl | 18 <NOSCRIPT><INPUT TYPE="SUBMIT" VALUE="Ir"></NOSCRIPT>
32 <NOSCRIPT><INPUT TYPE="SUBMIT" VALUE="Ir"></NOSCRIPT>
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | ia-neg-const.ll | 12 …%0 = call i64 asm sideeffect "ld $0,$1\0A\09add${2:I} $0,$0,$2", "=&r,*m,Ir"(i64* %x, i64 …
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | ia-neg-const.ll | 12 …%0 = call i64 asm sideeffect "ld $0,$1\0A\09add${2:I} $0,$0,$2", "=&r,*m,Ir"(i64* %x, i64 …
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| /external/icu/icu4c/source/data/region/ |
| D | ewo.txt | 93 IE{"Irəlándə"}
97 IQ{"Irág"}
98 IR{"Irán"}
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| D | pt_PT.txt | 37 IR{"Irão"}
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| D | lv.txt | 150 IQ{"Irāka"}
151 IR{"Irāna"}
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| D | sg.txt | 97 IQ{"Irâki"}
98 IR{"Iräan"}
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| /external/llvm-project/llvm/test/Instrumentation/MemorySanitizer/ |
| D | msan_x86_bts_asm.ll | 20 ; asm("btsq %2, %1; setc %0" : "=qm" (bit), "=m" (addr): "Ir" (nr));
49 …call void asm "btsq $2, $1; setc $0", "=*qm,=*m,Ir,~{dirflag},~{fpsr},~{flags}"(i8* %bit, i64** %a…
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| /external/llvm/test/CodeGen/ARM/ |
| D | 2009-08-15-RegScavenger-EarlyClobber.ll | 17 …ameters asm "adds $1, $2, $3; sbcccs $1, $1, $0; movcc $0, #0", "=&r,=&r,r,Ir,0,~{cc}"(i8* undef, …
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| D | crash-O0.ll | 10 …%asmtmp = call %struct0 asm sideeffect "...", "=&r,=&r,r,Ir,r,~{cc},~{memory}"(i32* undef, i32 und…
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | 2009-08-15-RegScavenger-EarlyClobber.ll | 17 …ameters asm "adds $1, $2, $3; sbcccs $1, $1, $0; movcc $0, #0", "=&r,=&r,r,Ir,0,~{cc}"(i8* undef, …
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| D | crash-O0.ll | 10 …%asmtmp = call %struct0 asm sideeffect "...", "=&r,=&r,r,Ir,r,~{cc},~{memory}"(i32* undef, i32 und…
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| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | inlineasm-constraint-ZC-2.ll | 30 …0Asc $1, $2\0Abeqz $1, 1b\0Aaddu $1, $0, $3\0A.set pop\0A", "=&r,=&r,=*^ZC,Ir,*^ZC,~{memory},~{$1}…
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| /external/icu/icu4c/source/data/curr/ |
| D | lv.txt | 312 "Irākas dinārs",
316 "Irānas riāls",
1276 one{"Irākas dinārs"}
1277 other{"Irākas dināri"}
1278 zero{"Irākas dināri"}
1281 one{"Irānas riāls"}
1282 other{"Irānas riāli"}
1283 zero{"Irānas riāli"}
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| /external/python/cryptography/vectors/cryptography_vectors/x509/PKITS_data/smime/ |
| D | SignedInvaliddeltaCRLTest4.eml | 93 Jcq7QbMwiIYUyoa+7R+VB76GZDbPJc3gTKrVA2b3eqNJge1kr+UfrfLRpXjYZ+Ir
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| D | SignedInvaliddeltaCRLTest3.eml | 93 Jcq7QbMwiIYUyoa+7R+VB76GZDbPJc3gTKrVA2b3eqNJge1kr+UfrfLRpXjYZ+Ir
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| D | SignedInvaliddeltaCRLTest6.eml | 93 Jcq7QbMwiIYUyoa+7R+VB76GZDbPJc3gTKrVA2b3eqNJge1kr+UfrfLRpXjYZ+Ir
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