1; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s --check-prefixes=ALL,R6 2; RUN: llc -march=mips -mcpu=mips64r6 -target-abi=n64 -relocation-model=pic \ 3; RUN: < %s | FileCheck %s --check-prefixes=ALL,R6 4; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s --check-prefixes=ALL,PRER6 5; RUN: llc -march=mips -mcpu=mips64 -target-abi=n64 -relocation-model=pic \ 6; RUN: < %s | FileCheck %s --check-prefixes=ALL,PRER6 7 8 9%struct.anon = type { [63 x i32], i32, i32 } 10 11define i32 @Atomic() { 12; CHECK-LABEL: Atomic: 13entry: 14 %s = alloca %struct.anon, align 4 15 %0 = bitcast %struct.anon* %s to i8* 16 %count = getelementptr inbounds %struct.anon, %struct.anon* %s, i64 0, i32 1 17 store i32 0, i32* %count, align 4 18; R6: addiu $[[R0:[0-9a-z]+]], $sp, {{[0-9]+}} 19 20; ALL: #APP 21 22; R6: ll ${{[0-9a-z]+}}, 0($[[R0]]) 23; R6: sc ${{[0-9a-z]+}}, 0($[[R0]]) 24 25; PRER6: ll ${{[0-9a-z]+}}, {{[0-9]+}}(${{[0-9a-z]+}}) 26; PRER6: sc ${{[0-9a-z]+}}, {{[0-9]+}}(${{[0-9a-z]+}}) 27 28; ALL: #NO_APP 29 30 %1 = call { i32, i32 } asm sideeffect ".set push\0A.set noreorder\0A1:\0All $0, $2\0Aaddu $1, $0, $3\0Asc $1, $2\0Abeqz $1, 1b\0Aaddu $1, $0, $3\0A.set pop\0A", "=&r,=&r,=*^ZC,Ir,*^ZC,~{memory},~{$1}"(i32* %count, i32 10, i32* %count) 31 %asmresult1.i = extractvalue { i32, i32 } %1, 1 32 %cmp = icmp ne i32 %asmresult1.i, 10 33 %conv = zext i1 %cmp to i32 34 %call2 = call i32 @f(i32 signext %conv) 35 ret i32 %call2 36} 37 38declare i32 @f(i32 signext) 39