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Searched refs:LD_H (Results 1 – 25 of 30) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
Drem_and_div_vec.mir71 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
72 ; P5600: [[LD_H1:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
73 ; P5600: [[DIV_S_H:%[0-9]+]]:msa128h = DIV_S_H [[LD_H]], [[LD_H1]]
191 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
192 ; P5600: [[LD_H1:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
193 ; P5600: [[MOD_S_H:%[0-9]+]]:msa128h = MOD_S_H [[LD_H]], [[LD_H1]]
311 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
312 ; P5600: [[LD_H1:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
313 ; P5600: [[DIV_U_H:%[0-9]+]]:msa128h = DIV_U_H [[LD_H]], [[LD_H1]]
431 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
[all …]
Dsub_vec.mir56 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
57 ; P5600: [[LD_H1:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
58 ; P5600: [[SUBV_H:%[0-9]+]]:msa128h = SUBV_H [[LD_H1]], [[LD_H]]
Dmul_vec.mir56 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
57 ; P5600: [[LD_H1:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
58 ; P5600: [[MULV_H:%[0-9]+]]:msa128h = MULV_H [[LD_H1]], [[LD_H]]
Dadd_vec.mir56 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY]], 0 :: (load 16 from %ir.a)
57 ; P5600: [[LD_H1:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
58 ; P5600: [[ADDV_H:%[0-9]+]]:msa128h = ADDV_H [[LD_H1]], [[LD_H]]
Dload_store_vec.mir51 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load 16 from %ir.b)
52 ; P5600: ST_H [[LD_H]], [[COPY]], 0 :: (store 16 into %ir.a)
/external/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp71 case Mips::LD_H: in getLoadStoreOffsetSizeInBits()
88 case Mips::LD_H: in getLoadStoreOffsetAlign()
DMipsSEInstrInfo.cpp286 Opc = Mips::LD_H; in loadRegFromStack()
DMipsMSAInstrInfo.td3215 def LD_H: LD_H_ENC, LD_H_DESC;
3526 def : MSAPat<(v8f16 (load addrimm10:$addr)), (LD_H addrimm10:$addr)>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp71 case Mips::LD_H: in getLoadStoreOffsetSizeInBits()
131 case Mips::LD_H: in getLoadStoreOffsetAlign()
DMipsInstructionSelector.cpp237 return isStore ? Mips::ST_H : Mips::LD_H; in selectLoadStoreOpCode()
DMipsSEInstrInfo.cpp354 Opc = Mips::LD_H; in loadRegFromStack()
DMipsMSAInstrInfo.td3255 def LD_H: LD_H_ENC, LD_H_DESC;
3566 def : MSAPat<(v8f16 (load addrimm10lsl1:$addr)), (LD_H addrimm10lsl1:$addr)>;
/external/llvm-project/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp71 case Mips::LD_H: in getLoadStoreOffsetSizeInBits()
131 case Mips::LD_H: in getLoadStoreOffsetAlign()
DMipsInstructionSelector.cpp243 return isStore ? Mips::ST_H : Mips::LD_H; in selectLoadStoreOpCode()
DMipsSEInstrInfo.cpp354 Opc = Mips::LD_H; in loadRegFromStack()
DMipsMSAInstrInfo.td3275 def LD_H: LD_H_ENC, LD_H_DESC;
3586 def : MSAPat<(v8f16 (load addrimm10lsl1:$addr)), (LD_H addrimm10lsl1:$addr)>;
/external/webp/src/dsp/
Dmsa_macro.h52 #define LD_H(RTYPE, psrc) *((RTYPE*)(psrc)) macro
53 #define LD_UH(...) LD_H(v8u16, __VA_ARGS__)
54 #define LD_SH(...) LD_H(v8i16, __VA_ARGS__)
256 out0 = LD_H(RTYPE, psrc); \
257 out1 = LD_H(RTYPE, psrc + stride); \
/external/libvpx/libvpx/vp8/common/mips/msa/
Dvp8_macros_msa.h23 #define LD_H(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
24 #define LD_UH(...) LD_H(v8u16, __VA_ARGS__)
25 #define LD_SH(...) LD_H(v8i16, __VA_ARGS__)
317 out0 = LD_H(RTYPE, (psrc)); \
318 out1 = LD_H(RTYPE, (psrc) + (stride)); \
/external/libaom/libaom/aom_dsp/mips/
Dmacros_msa.h25 #define LD_H(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
26 #define LD_UH(...) LD_H(v8u16, __VA_ARGS__)
27 #define LD_SH(...) LD_H(v8i16, __VA_ARGS__)
350 out0 = LD_H(RTYPE, (psrc)); \
351 out1 = LD_H(RTYPE, (psrc) + (stride)); \
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp1490 case Mips::LD_H: in DecodeMSA128Mem()
/external/llvm-project/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp1733 case Mips::LD_H: in DecodeMSA128Mem()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp1733 case Mips::LD_H: in DecodeMSA128Mem()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc964 58740709U, // LD_H
2753 0U, // LD_H
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc1771 UINT64_C(2013265953), // LD_H
2978 case Mips::LD_H:
11233 CEFBS_HasStdEnc_HasMSA, // LD_H = 1758
DMipsGenAsmWriter.inc2999 25186646U, // LD_H
5753 0U, // LD_H

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