| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | aix-csr.ll | 175 ; MIR64-DAG: $f31 = LFD 392, $x1 :: (load 8 from %fixed-stack.0)
176 ; MIR64-DAG: $f21 = LFD 312, $x1 :: (load 8 from %fixed-stack.1)
177 ; MIR64-DAG: $f19 = LFD 296, $x1 :: (load 8 from %fixed-stack.2)
178 ; MIR64-DAG: $f14 = LFD 256, $x1 :: (load 8 from %fixed-stack.3, align 16)
205 ; MIR32-DAG: $f31 = LFD 280, $r1 :: (load 8 from %fixed-stack.0)
206 ; MIR32-DAG: $f21 = LFD 200, $r1 :: (load 8 from %fixed-stack.1)
207 ; MIR32-DAG: $f19 = LFD 184, $r1 :: (load 8 from %fixed-stack.2)
208 ; MIR32-DAG: $f14 = LFD 144, $r1 :: (load 8 from %fixed-stack.3, align 16)
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| D | aix-cc-abi.ll | 451 ; 32BIT-NEXT: renamable $f1 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load 8 from @d1)
508 ; 64BIT-NEXT: renamable $f1 = LFD 0, killed renamable $x[[REGD1ADDR:[0-9]+]] :: (dereferenceable lo…
604 ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG2]] :: (dereferenceable load 8 from @d…
614 ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG2]] :: (dereferenceable load 8 from @d…
708 ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load 8 from @d1)
739 ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load 8 from @d1)
777 ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load 8 from @d1)
808 ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load 8 from @d1)
848 ; 32BIT-NEXT: renamable $f2 = LFD 0, killed renamable $r[[REG]] :: (dereferenceable load 8 from @d1)
881 ; 64BIT-NEXT: renamable $f2 = LFD 0, killed renamable $x[[REG]] :: (dereferenceable load 8 from @d1)
[all …]
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| D | aix-csr-vector.ll | 171 ; MIR32-DAG: $f14 = LFD 304, $r1 :: (load 8 from %fixed-stack.5, align 16)
172 ; MIR32-DAG: $f21 = LFD 360, $r1 :: (load 8 from %fixed-stack.4)
173 ; MIR32-DAG: $f31 = LFD 440, $r1 :: (load 8 from %fixed-stack.3)
236 ; MIR64-DAG: $f14 = LFD 400, $x1 :: (load 8 from %fixed-stack.5, align 16)
237 ; MIR64-DAG: $f21 = LFD 456, $x1 :: (load 8 from %fixed-stack.4)
238 ; MIR64-DAG: $f31 = LFD 536, $x1 :: (load 8 from %fixed-stack.3)
|
| D | aix64-cc-abi-vaarg.ll | 232 ; 64BIT-DAG: renamable $f0 = LFD 0, %fixed-stack.0 :: (load 8)
235 ; 64BIT-DAG: renamable $f2 = LFD 0, killed renamable $x6 :: (load 8)
322 ; 64BIT-DAG: renamable $f0 = LFD 0, %fixed-stack.0 :: (load 8)
|
| D | toc-float.ll | 110 ; Access an element with an offset that doesn't fit in the displacement field of LFD.
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| D | aix32-cc-abi-vaarg.ll | 343 ; 32BIT-DAG: renamable $f1 = LFD 0, %stack.2 :: (load 8 from %stack.2)
346 ; 32BIT-DAG: renamable $f2 = LFD 0, %stack.3 :: (load 8 from %stack.3)
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| D | aix-cc-byval.ll | 904 ; 32BIT-NEXT: renamable $f1 = LFD 16, %fixed-stack.0 :: (dereferenceable load 8
917 ; 64BIT-NEXT: renamable $f1 = LFD 16, %fixed-stack.0 :: (dereferenceable load 8
|
| /external/llvm-project/lld/ELF/Arch/ |
| D | PPCInsns.def | 13 PCREL_OPT(LFD, PLFD, OPC_AND_RST);
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| D | PPC64.cpp | 78 LFD = 0xc8000000, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCQPXLoadSplat.cpp | 91 case PPC::LFD: in runOnMachineFunction()
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| D | PPCFastISel.cpp | 167 unsigned FP64LoadOpc = PPC::LFD);
518 bool Is64VSXLoad = IsVSFRC && Opc == PPC::LFD; in PPCEmitLoad()
571 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
617 PPCSubTarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in SelectLoad()
1041 unsigned LoadOpc = PPC::LFD; in PPCMoveToFPReg()
2021 Opc = ((VT == MVT::f32) ? PPC::LFS : PPC::LFD); in PPCMaterializeFP()
2358 PPCSubTarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in tryToFoldLoadIntoMI()
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| D | PPCInstrInfo.cpp | 2059 LowerOpcode = PPC::LFD; in expandVSXMemPseudo()
2422 {PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, in getLoadOpcodesForSpillArray()
2427 {PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, in getLoadOpcodesForSpillArray()
3244 case PPC::LFDX: III.ImmOpcode = PPC::LFD; break; in instrHasImmForm()
3365 III.ImmOpcode = PPC::LFD; in instrHasImmForm()
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| D | PPCRegisterInfo.cpp | 89 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
|
| D | P9InstrResources.td | 763 LFD
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCQPXLoadSplat.cpp | 96 case PPC::LFD: in runOnMachineFunction()
|
| D | PPCFastISel.cpp | 159 unsigned FP64LoadOpc = PPC::LFD);
527 bool Is64VSXLoad = IsVSSRC && Opc == PPC::LFD; in PPCEmitLoad()
580 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
976 unsigned LoadOpc = PPC::LFD; in PPCMoveToFPReg()
1917 unsigned Opc = (VT == MVT::f32) ? PPC::LFS : PPC::LFD; in PPCMaterializeFP()
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| D | PPCInstrInfo.cpp | 271 case PPC::LFD: in isLoadFromStackSlot()
1108 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::LFD), DestReg), in LoadRegFromStackSlot()
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| D | PPCRegisterInfo.cpp | 69 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 137 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
144 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
151 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
|
| D | PPCFastISel.cpp | 168 unsigned FP64LoadOpc = PPC::LFD);
519 bool Is64VSXLoad = IsVSFRC && Opc == PPC::LFD; in PPCEmitLoad()
572 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
618 Subtarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in SelectLoad()
1043 unsigned LoadOpc = PPC::LFD; in PPCMoveToFPReg()
2031 Opc = ((VT == MVT::f32) ? PPC::LFS : PPC::LFD); in PPCMaterializeFP()
2372 Subtarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in tryToFoldLoadIntoMI()
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| D | PPCPreEmitPeephole.cpp | 80 case PPC::LFD: in hasPCRelativeForm()
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| D | PPCRegisterInfo.cpp | 104 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
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| D | PPCInstrInfo.cpp | 2474 LowerOpcode = PPC::LFD; in expandVSXMemPseudo()
3677 case PPC::LFDX: III.ImmOpcode = PPC::LFD; break; in instrHasImmForm()
3798 III.ImmOpcode = PPC::LFD; in instrHasImmForm()
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| D | P9InstrResources.td | 764 LFD
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenMCCodeEmitter.inc | 1054 UINT64_C(3355443200), // LFD
2692 case PPC::LFD:
7464 CEFBS_None, // LFD = 1041
|