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1; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -verify-machineinstrs \
2; RUN: -mcpu=pwr4 -mattr=-altivec -stop-after=prologepilog < %s | \
3; RUN: FileCheck --check-prefix=MIR64 %s
4
5; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -verify-machineinstrs \
6; RUN: -mcpu=pwr4 -mattr=-altivec < %s | FileCheck --check-prefix=ASM64 %s
7
8; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -verify-machineinstrs \
9; RUN: -mcpu=pwr4 -mattr=-altivec -stop-after=prologepilog < %s | \
10; RUN: FileCheck --check-prefix=MIR32 %s
11
12; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -verify-machineinstrs \
13; RUN: -mcpu=pwr4 -mattr=-altivec < %s | FileCheck --check-prefix=ASM32 %s
14
15define dso_local signext i32 @gprs_only(i32 signext %i) {
16entry:
17  call void asm sideeffect "", "~{r16},~{r22},~{r30}"()
18  ret i32 %i
19}
20
21; MIR64:       name:            gprs_only
22; MIR64-LABEL: fixedStack:
23; MIR64-NEXT:   - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
24; MIR64-NEXT:       callee-saved-register: '$x30', callee-saved-restored: true, debug-info-variable: '',
25; MIR64-NEXT:       debug-info-expression: '', debug-info-location: '' }
26; MIR64-NEXT:   - { id: 1, type: spill-slot, offset: -80, size: 8, alignment: 16, stack-id: default,
27; MIR64-NEXT:       callee-saved-register: '$x22', callee-saved-restored: true, debug-info-variable: '',
28; MIR64-NEXT:       debug-info-expression: '', debug-info-location: '' }
29; MIR64-NEXT:   - { id: 2, type: spill-slot, offset: -128, size: 8, alignment: 16, stack-id: default,
30; MIR64-NEXT:       callee-saved-register: '$x16', callee-saved-restored: true, debug-info-variable: '',
31; MIR64-NEXT:       debug-info-expression: '', debug-info-location: '' }
32; MIR64-NEXT:  stack:           []
33
34; MIR32:       name:            gprs_only
35; MIR32-LABEL: fixedStack:
36; MIR32:        - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: default,
37; MIR32-NEXT:       callee-saved-register: '$r30', callee-saved-restored: true, debug-info-variable: '',
38; MIR32-NEXT:       debug-info-expression: '', debug-info-location: '' }
39; MIR32-NEXT:   - { id: 1, type: spill-slot, offset: -40, size: 4, alignment: 8, stack-id: default,
40; MIR32-NEXT:       callee-saved-register: '$r22', callee-saved-restored: true, debug-info-variable: '',
41; MIR32-NEXT:       debug-info-expression: '', debug-info-location: '' }
42; MIR32-NEXT:   - { id: 2, type: spill-slot, offset: -64, size: 4, alignment: 16, stack-id: default,
43; MIR32-NEXT:       callee-saved-register: '$r16', callee-saved-restored: true, debug-info-variable: '',
44; MIR32-NEXT:       debug-info-expression: '', debug-info-location: '' }
45; MIR32-NEXT:  stack:           []
46
47
48; MIR64: liveins: $x3, $x16, $x22, $x30
49
50; MIR64-DAG: STD killed $x16, -128, $x1 :: (store 8 into %fixed-stack.2, align 16)
51; MIR64-DAG: STD killed $x22, -80, $x1 :: (store 8 into %fixed-stack.1, align 16)
52; MIR64-DAG: STD killed $x30, -16, $x1 :: (store 8 into %fixed-stack.0, align 16)
53
54; MIR64:     INLINEASM
55
56; MIR64-DAG: $x30 = LD -16, $x1 :: (load 8 from %fixed-stack.0, align 16)
57; MIR64-DAG: $x22 = LD -80, $x1 :: (load 8 from %fixed-stack.1, align 16)
58; MIR64-DAG: $x16 = LD -128, $x1 :: (load 8 from %fixed-stack.2, align 16)
59; MIR64:     BLR8 implicit $lr8, implicit $rm, implicit $x3
60
61
62; MIR32: liveins: $r3, $r16, $r22, $r30
63
64; MIR32-DAG: STW killed $r16, -64, $r1 :: (store 4 into %fixed-stack.2, align 16)
65; MIR32-DAG: STW killed $r22, -40, $r1 :: (store 4 into %fixed-stack.1, align 8)
66; MIR32-DAG: STW killed $r30, -8, $r1 :: (store 4 into %fixed-stack.0, align 8)
67
68; MIR32:     INLINEASM
69
70; MIR32-DAG: $r30 = LWZ -8, $r1 :: (load 4 from %fixed-stack.0, align 8)
71; MIR32-DAG: $r22 = LWZ -40, $r1 :: (load 4 from %fixed-stack.1, align 8)
72; MIR32-DAG: $r16 = LWZ -64, $r1 :: (load 4 from %fixed-stack.2, align 16)
73; MIR32:     BLR implicit $lr, implicit $rm, implicit $r3
74
75
76; ASM64-LABEL: .gprs_only:
77; ASM64-DAG:      std 16, -128(1)                 # 8-byte Folded Spill
78; ASM64-DAG:      std 22, -80(1)                  # 8-byte Folded Spill
79; ASM64-DAG:      std 30, -16(1)                  # 8-byte Folded Spill
80; ASM64:          #APP
81; ASM64-DAG:      ld 30, -16(1)                   # 8-byte Folded Reload
82; ASM64-DAG:      ld 22, -80(1)                   # 8-byte Folded Reload
83; ASM64-DAG:      ld 16, -128(1)                  # 8-byte Folded Reload
84; ASM64:          blr
85
86; ASM32-LABEl: .gprs_only:
87; ASM32-DAG:     stw 16, -64(1)                  # 4-byte Folded Spill
88; ASM32-DAG:     stw 22, -40(1)                  # 4-byte Folded Spill
89; ASM32-DAG:     stw 30, -8(1)                   # 4-byte Folded Spill
90; ASM32:         #APP
91; ASM32-DAG:     lwz 30, -8(1)                   # 4-byte Folded Reload
92; ASM32-DAG:     lwz 22, -40(1)                  # 4-byte Folded Reload
93; ASM32-DAG:     lwz 16, -64(1)                  # 4-byte Folded Reload
94; ASM32-DAG:     blr
95
96
97declare double @dummy(i32 signext);
98
99define dso_local double @fprs_and_gprs(i32 signext %i) {
100  call void asm sideeffect "", "~{r13},~{r14},~{r25},~{r31},~{f14},~{f19},~{f21},~{f31}"()
101  %result = call double @dummy(i32 signext %i)
102  ret double %result
103}
104
105; MIR64:       name:            fprs_and_gprs
106; MIR64-LABEL: fixedStack:
107; MIR64-NEXT:    - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
108; MIR64-NEXT:        callee-saved-register: '$f31', callee-saved-restored: true, debug-info-variable: '',
109; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
110; MIR64-NEXT:    - { id: 1, type: spill-slot, offset: -88, size: 8, alignment: 8, stack-id: default,
111; MIR64-NEXT:        callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variable: '',
112; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
113; MIR64-NEXT:    - { id: 2, type: spill-slot, offset: -104, size: 8, alignment: 8, stack-id: default,
114; MIR64-NEXT:        callee-saved-register: '$f19', callee-saved-restored: true, debug-info-variable: '',
115; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
116; MIR64-NEXT:    - { id: 3, type: spill-slot, offset: -144, size: 8, alignment: 16, stack-id: default,
117; MIR64-NEXT:        callee-saved-register: '$f14', callee-saved-restored: true, debug-info-variable: '',
118; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
119; MIR64-NEXT:    - { id: 4, type: spill-slot, offset: -152, size: 8, alignment: 8, stack-id: default,
120; MIR64-NEXT:        callee-saved-register: '$x31', callee-saved-restored: true, debug-info-variable: '',
121; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
122; MIR64-NEXT:    - { id: 5, type: spill-slot, offset: -200, size: 8, alignment: 8, stack-id: default,
123; MIR64-NEXT:        callee-saved-register: '$x25', callee-saved-restored: true, debug-info-variable: '',
124; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
125; MIR64-NEXT:    - { id: 6, type: spill-slot, offset: -288, size: 8, alignment: 16, stack-id: default,
126; MIR64-NEXT:        callee-saved-register: '$x14', callee-saved-restored: true, debug-info-variable: '',
127; MIR64-NEXT:        debug-info-expression: '', debug-info-location: '' }
128; MIR64-NEXT:  stack:           []
129
130; MIR32:       name:            fprs_and_gprs
131; MIR32-LABEL: fixedStack:
132; MIR32-NEXT:    - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
133; MIR32-NEXT:        callee-saved-register: '$f31', callee-saved-restored: true, debug-info-variable: '',
134; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
135; MIR32-NEXT:    - { id: 1, type: spill-slot, offset: -88, size: 8, alignment: 8, stack-id: default,
136; MIR32-NEXT:        callee-saved-register: '$f21', callee-saved-restored: true, debug-info-variable: '',
137; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
138; MIR32-NEXT:    - { id: 2, type: spill-slot, offset: -104, size: 8, alignment: 8, stack-id: default,
139; MIR32-NEXT:        callee-saved-register: '$f19', callee-saved-restored: true, debug-info-variable: '',
140; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
141; MIR32-NEXT:    - { id: 3, type: spill-slot, offset: -144, size: 8, alignment: 16, stack-id: default,
142; MIR32-NEXT:        callee-saved-register: '$f14', callee-saved-restored: true, debug-info-variable: '',
143; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
144; MIR32-NEXT:    - { id: 4, type: spill-slot, offset: -148, size: 4, alignment: 4, stack-id: default,
145; MIR32-NEXT:        callee-saved-register: '$r31', callee-saved-restored: true, debug-info-variable: '',
146; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
147; MIR32-NEXT:    - { id: 5, type: spill-slot, offset: -172, size: 4, alignment: 4, stack-id: default,
148; MIR32-NEXT:        callee-saved-register: '$r25', callee-saved-restored: true, debug-info-variable: '',
149; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
150; MIR32-NEXT:    - { id: 6, type: spill-slot, offset: -216, size: 4, alignment: 8, stack-id: default,
151; MIR32-NEXT:        callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '',
152; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
153; MIR32-NEXT:    - { id: 7, type: spill-slot, offset: -220, size: 4, alignment: 4, stack-id: default,
154; MIR32-NEXT:        callee-saved-register: '$r13', callee-saved-restored: true, debug-info-variable: '',
155; MIR32-NEXT:        debug-info-expression: '', debug-info-location: '' }
156; MIR32-NEXT:  stack:           []
157
158
159; MIR64: liveins: $x3, $x14, $x25, $x31, $f14, $f19, $f21, $f31
160
161; MIR64:       $x0 = MFLR8 implicit $lr8
162; MIR64-NEXT:  STD killed $x0, 16, $x1
163; MIR64-NEXT:  $x1 = STDU $x1, -400, $x1
164; MIR64-DAG:   STD killed $x14, 112, $x1 :: (store 8 into %fixed-stack.6, align 16)
165; MIR64-DAG:   STD killed $x25, 200, $x1 :: (store 8 into %fixed-stack.5)
166; MIR64-DAG:   STD killed $x31, 248, $x1 :: (store 8 into %fixed-stack.4)
167; MIR64-DAG:   STFD killed $f14, 256, $x1 :: (store 8 into %fixed-stack.3, align 16)
168; MIR64-DAG:   STFD killed $f19, 296, $x1 :: (store 8 into %fixed-stack.2)
169; MIR64-DAG:   STFD killed $f21, 312, $x1 :: (store 8 into %fixed-stack.1)
170; MIR64-DAG:   STFD killed $f31, 392, $x1 :: (store 8 into %fixed-stack.0)
171
172; MIR64:       INLINEASM
173; MIR64-NEXT:  BL8_NOP
174
175; MIR64-DAG:   $f31 = LFD 392, $x1 :: (load 8 from %fixed-stack.0)
176; MIR64-DAG:   $f21 = LFD 312, $x1 :: (load 8 from %fixed-stack.1)
177; MIR64-DAG:   $f19 = LFD 296, $x1 :: (load 8 from %fixed-stack.2)
178; MIR64-DAG:   $f14 = LFD 256, $x1 :: (load 8 from %fixed-stack.3, align 16)
179; MIR64-DAG:   $x31 = LD 248, $x1 :: (load 8 from %fixed-stack.4)
180; MIR64-DAG:   $x25 = LD 200, $x1 :: (load 8 from %fixed-stack.5)
181; MIR64-DAG:   $x14 = LD 112, $x1 :: (load 8 from %fixed-stack.6, align 16)
182; MIR64:       $x1 = ADDI8 $x1, 400
183; MIR64-NEXT:  $x0 = LD 16, $x1
184; MIR64-NEXT:  MTLR8 $x0, implicit-def $lr8
185; MIR64-NEXT:  BLR8 implicit $lr8, implicit $rm, implicit $f1
186
187
188; MIR32: liveins: $r3, $r13, $r14, $r25, $r31, $f14, $f19, $f21, $f31
189
190; MIR32:      $r0 = MFLR implicit $lr
191; MIR32-NEXT: STW killed $r0, 8, $r1
192; MIR32-NEXT: $r1 = STWU $r1, -288, $r1
193; MIR32-DAG:  STW killed $r13, 68, $r1 :: (store 4 into %fixed-stack.7)
194; MIR32-DAG:  STW killed $r14, 72, $r1 :: (store 4 into %fixed-stack.6, align 8)
195; MIR32-DAG:  STW killed $r25, 116, $r1 :: (store 4 into %fixed-stack.5)
196; MIR32-DAG:  STW killed $r31, 140, $r1 :: (store 4 into %fixed-stack.4)
197; MIR32-DAG:  STFD killed $f14, 144, $r1 :: (store 8 into %fixed-stack.3, align 16)
198; MIR32-DAG:  STFD killed $f19, 184, $r1 :: (store 8 into %fixed-stack.2)
199; MIR32-DAG:  STFD killed $f21, 200, $r1 :: (store 8 into %fixed-stack.1)
200; MIR32-DAG:  STFD killed $f31, 280, $r1 :: (store 8 into %fixed-stack.0)
201
202; MIR32:      INLINEASM
203; MIR32:      BL_NOP
204
205; MIR32-DAG:  $f31 = LFD 280, $r1 :: (load 8 from %fixed-stack.0)
206; MIR32-DAG:  $f21 = LFD 200, $r1 :: (load 8 from %fixed-stack.1)
207; MIR32-DAG:  $f19 = LFD 184, $r1 :: (load 8 from %fixed-stack.2)
208; MIR32-DAG:  $f14 = LFD 144, $r1 :: (load 8 from %fixed-stack.3, align 16)
209; MIR32-DAG:  $r31 = LWZ 140, $r1 :: (load 4 from %fixed-stack.4)
210; MIR32-DAG:  $r25 = LWZ 116, $r1 :: (load 4 from %fixed-stack.5)
211; MIR32-DAG:  $r14 = LWZ 72, $r1 :: (load 4 from %fixed-stack.6, align 8)
212; MIR32-DAG:  $r13 = LWZ 68, $r1 :: (load 4 from %fixed-stack.7)
213; MIR32:      $r1 = ADDI $r1, 288
214; MIR32-NEXT: $r0 = LWZ 8, $r1
215; MIR32-NEXT: MTLR $r0, implicit-def $lr
216; MIR32-NEXT: BLR implicit $lr, implicit $rm, implicit $f1
217
218; ASM64-LABEL: .fprs_and_gprs:
219; ASM64:         mflr 0
220; ASM64-NEXT:    std 0, 16(1)
221; ASM64-NEXT:    stdu 1, -400(1)
222; ASM64-DAG:     std 14, 112(1)                  # 8-byte Folded Spill
223; ASM64-DAG:     std 25, 200(1)                  # 8-byte Folded Spill
224; ASM64-DAG:     std 31, 248(1)                  # 8-byte Folded Spill
225; ASM64-DAG:     stfd 14, 256(1)                 # 8-byte Folded Spill
226; ASM64-DAG:     stfd 19, 296(1)                 # 8-byte Folded Spill
227; ASM64-DAG:     stfd 21, 312(1)                 # 8-byte Folded Spill
228; ASM64-DAG:     stfd 31, 392(1)                 # 8-byte Folded Spill
229
230; ASM64:         bl .dummy
231
232; ASM64-DAG:     lfd 31, 392(1)                  # 8-byte Folded Reload
233; ASM64-DAG:     lfd 21, 312(1)                  # 8-byte Folded Reload
234; ASM64-DAG:     lfd 19, 296(1)                  # 8-byte Folded Reload
235; ASM64-DAG:     lfd 14, 256(1)                  # 8-byte Folded Reload
236; ASM64-DAG:     ld 31, 248(1)                   # 8-byte Folded Reload
237; ASM64-DAG:     ld 25, 200(1)                   # 8-byte Folded Reload
238; ASM64-DAG:     ld 14, 112(1)                   # 8-byte Folded Reload
239; ASM64:         addi 1, 1, 400
240; ASM64-NEXT:    ld 0, 16(1)
241; ASM64-NEXT:    mtlr 0
242; ASM64-NEXT:    blr
243
244; ASM32-LABEL: .fprs_and_gprs:
245; ASM32:         mflr 0
246; ASM32-NEXT:    stw 0, 8(1)
247; ASM32-NEXT:    stwu 1, -288(1)
248; ASM32-DAG:     stw 13, 68(1)                   # 4-byte Folded Spill
249; ASM32-DAG:     stw 14, 72(1)                   # 4-byte Folded Spill
250; ASM32-DAG:     stw 25, 116(1)                  # 4-byte Folded Spill
251; ASM32-DAG:     stw 31, 140(1)                  # 4-byte Folded Spill
252; ASM32-DAG:     stfd 14, 144(1)                 # 8-byte Folded Spill
253; ASM32-DAG:     stfd 19, 184(1)                 # 8-byte Folded Spill
254; ASM32-DAG:     stfd 21, 200(1)                 # 8-byte Folded Spill
255; ASM32-DAG:     stfd 31, 280(1)                 # 8-byte Folded Spill
256
257; ASM32-DAG:     bl .dummy
258
259; ASM32-DAG:     lfd 31, 280(1)                  # 8-byte Folded Reload
260; ASM32-DAG:     lfd 21, 200(1)                  # 8-byte Folded Reload
261; ASM32-DAG:     lfd 19, 184(1)                  # 8-byte Folded Reload
262; ASM32-DAG:     lfd 14, 144(1)                  # 8-byte Folded Reload
263; ASM32-DAG:     lwz 31, 140(1)                  # 4-byte Folded Reload
264; ASM32-DAG:     lwz 25, 116(1)                  # 4-byte Folded Reload
265; ASM32-DAG:     lwz 14, 72(1)                   # 4-byte Folded Reload
266; ASM32-DAG:     lwz 13, 68(1)                   # 4-byte Folded Reload
267; ASM32:         addi 1, 1, 288
268; ASM32-NEXT:    lwz 0, 8(1)
269; ASM32-NEXT:    mtlr 0
270; ASM32-NEXT:    blr
271