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Searched refs:MODE32_svc (Results 1 – 25 of 25) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx7/common/
Dimx7_bl2_el3_common.c43 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in imx7_get_spsr_for_bl32_entry()
49 return SPSR_MODE32(MODE32_svc, in imx7_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_bl2_setup.c112 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in qemu_get_spsr_for_bl32_entry()
136 spsr = SPSR_MODE32(MODE32_svc, in qemu_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
Dplat_sip_calls.c29 #define SPSR32 SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, \
/external/arm-trusted-firmware/include/arch/aarch32/
Dsmccc_macros.S43 cps #MODE32_svc
185 cps #MODE32_svc
Darch_helpers.h362 #define IS_IN_SVC() (GET_M32(read_cpsr()) == MODE32_svc) in DEFINE_SYSREG_RW_FUNCS()
Darch.h392 #define MODE32_svc U(0x13) macro
/external/arm-trusted-firmware/bl2/aarch32/
Dbl2_el3_entrypoint.S84 cps #MODE32_svc
/external/arm-trusted-firmware/services/spd/opteed/
Dopteed_common.c51 optee_entry_point->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in opteed_init_optee_ep_state()
/external/arm-trusted-firmware/plat/layerscape/common/
Dls_common.c173 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in ls_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/mediatek/common/
Dmtk_plat_common.c110 mode = MODE32_svc; in plat_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/arm/common/aarch64/
Dexecution_state_switch.c128 el = from_el2 ? MODE32_hyp : MODE32_svc; in arm_execution_state_switch()
/external/arm-trusted-firmware/plat/arm/common/
Darm_common.c113 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in arm_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/services/spd/tlkd/
Dtlkd_common.c100 spsr = SPSR_MODE32(MODE32_svc, in tlkd_init_tlk_ep_state()
/external/arm-trusted-firmware/plat/hisilicon/poplar/
Dbl2_plat_setup.c85 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in poplar_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/bl1/aarch32/
Dbl1_context_mgmt.c105 unsigned int security_state, mode = MODE32_svc; in bl1_prepare_next_image()
Dbl1_exceptions.S77 cps #MODE32_svc
/external/arm-trusted-firmware/plat/imx/common/
Dimx_sip_handler.c204 mode = MODE32_svc; in imx_kernel_entry_handler()
/external/arm-trusted-firmware/plat/xilinx/common/
Dplat_startup.c228 bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in fsbl_atf_handover()
/external/arm-trusted-firmware/services/spd/trusty/
Dtrusty.c467 ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in trusty_setup()
507 spsr |= MODE32_svc << MODE32_SHIFT; in trusty_setup()
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_bl2_setup.c104 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in hikey_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/lib/psci/
Dpsci_common.c671 MODE32_hyp : MODE32_svc; in psci_get_ns_ep_info()
718 mode = scr & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc; in psci_get_ns_ep_info()
/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_bl2_setup.c196 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in hikey960_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/lib/cpus/aarch64/
Dwa_cve_2017_5715_bpiall.S66 movz w8, SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, SPSR_AIF_MASK)
/external/arm-trusted-firmware/services/std_svc/spmd/
Dspmd_main.c266 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in spmd_spmc_init()
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h675 #define MODE32_svc U(0x3) macro