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Searched refs:MRM0m (Results 1 – 25 of 48) sorted by relevance

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/external/llvm-project/llvm/lib/Target/X86/
DX86InstrAMX.td20 def LDTILECFG : I <0x49, MRM0m, (outs), (ins opaquemem:$src),
23 def STTILECFG : I <0x49, MRM0m, (outs), (ins opaquemem:$src),
DX86InstrShiftRotate.td505 def ROL8mCL : I<0xD2, MRM0m, (outs), (ins i8mem :$dst),
508 def ROL16mCL : I<0xD3, MRM0m, (outs), (ins i16mem:$dst),
511 def ROL32mCL : I<0xD3, MRM0m, (outs), (ins i32mem:$dst),
514 def ROL64mCL : RI<0xD3, MRM0m, (outs), (ins i64mem:$dst),
521 def ROL8mi : Ii8<0xC0, MRM0m, (outs), (ins i8mem :$dst, u8imm:$src1),
524 def ROL16mi : Ii8<0xC1, MRM0m, (outs), (ins i16mem:$dst, u8imm:$src1),
528 def ROL32mi : Ii8<0xC1, MRM0m, (outs), (ins i32mem:$dst, u8imm:$src1),
532 def ROL64mi : RIi8<0xC1, MRM0m, (outs), (ins i64mem:$dst, u8imm:$src1),
538 def ROL8m1 : I<0xD0, MRM0m, (outs), (ins i8mem :$dst),
541 def ROL16m1 : I<0xD1, MRM0m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrKL.td72 def AESENCWIDE128KL : I<0xD8, MRM0m, (outs), (ins opaquemem:$src),
DX86InstrFPStack.td291 defm ADD : FPBinary<any_fadd, MRM0m, "add">;
551 def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s}\t$src">;
552 def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l}\t$src">;
555 def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s}\t$src">;
556 def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l}\t$src">;
752 def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaquemem:$dst),
755 def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaquemem:$dst),
DX86Instr3DNow.td94 def PREFETCH : I3DNow<0x0D, MRM0m, (outs), (ins i8mem:$addr),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td505 def ROL8mCL : I<0xD2, MRM0m, (outs), (ins i8mem :$dst),
508 def ROL16mCL : I<0xD3, MRM0m, (outs), (ins i16mem:$dst),
511 def ROL32mCL : I<0xD3, MRM0m, (outs), (ins i32mem:$dst),
514 def ROL64mCL : RI<0xD3, MRM0m, (outs), (ins i64mem:$dst),
521 def ROL8mi : Ii8<0xC0, MRM0m, (outs), (ins i8mem :$dst, u8imm:$src1),
524 def ROL16mi : Ii8<0xC1, MRM0m, (outs), (ins i16mem:$dst, u8imm:$src1),
528 def ROL32mi : Ii8<0xC1, MRM0m, (outs), (ins i32mem:$dst, u8imm:$src1),
532 def ROL64mi : RIi8<0xC1, MRM0m, (outs), (ins i64mem:$dst, u8imm:$src1),
538 def ROL8m1 : I<0xD0, MRM0m, (outs), (ins i8mem :$dst),
541 def ROL16m1 : I<0xD1, MRM0m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td297 defm ADD : FPBinary<any_fadd, MRM0m, "add">;
549 def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s}\t$src">;
550 def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l}\t$src">;
553 def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s}\t$src">;
554 def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l}\t$src">;
756 def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaquemem:$dst),
759 def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaquemem:$dst),
DX86Instr3DNow.td94 def PREFETCH : I3DNow<0x0D, MRM0m, (outs), (ins i8mem:$addr),
DX86InstrArithmetic.td470 def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b}\t$dst",
473 def INC16m : I<0xFF, MRM0m, (outs), (ins i16mem:$dst), "inc{w}\t$dst",
476 def INC32m : I<0xFF, MRM0m, (outs), (ins i32mem:$dst), "inc{l}\t$dst",
481 def INC64m : RI<0xFF, MRM0m, (outs), (ins i64mem:$dst), "inc{q}\t$dst",
1178 defm ADD : ArithBinOp_RF<0x00, 0x02, 0x04, "add", MRM0r, MRM0m,
1253 def TEST8mi : BinOpMI_F<0xF6, "test", Xi8 , X86testpat, MRM0m>;
1254 def TEST16mi : BinOpMI_F<0xF6, "test", Xi16, X86testpat, MRM0m>;
1255 def TEST32mi : BinOpMI_F<0xF6, "test", Xi32, X86testpat, MRM0m>;
1257 def TEST64mi32 : BinOpMI_F<0xF6, "test", Xi64, X86testpat, MRM0m>;
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td523 def ROL8mCL : I<0xD2, MRM0m, (outs), (ins i8mem :$dst),
527 def ROL16mCL : I<0xD3, MRM0m, (outs), (ins i16mem:$dst),
531 def ROL32mCL : I<0xD3, MRM0m, (outs), (ins i32mem:$dst),
535 def ROL64mCL : RI<0xD3, MRM0m, (outs), (ins i64mem:$dst),
540 def ROL8mi : Ii8<0xC0, MRM0m, (outs), (ins i8mem :$dst, u8imm:$src1),
544 def ROL16mi : Ii8<0xC1, MRM0m, (outs), (ins i16mem:$dst, u8imm:$src1),
548 def ROL32mi : Ii8<0xC1, MRM0m, (outs), (ins i32mem:$dst, u8imm:$src1),
552 def ROL64mi : RIi8<0xC1, MRM0m, (outs), (ins i64mem:$dst, u8imm:$src1),
558 def ROL8m1 : I<0xD0, MRM0m, (outs), (ins i8mem :$dst),
562 def ROL16m1 : I<0xD1, MRM0m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrFPStack.td244 defm ADD : FPBinary<fadd, MRM0m, "add">;
470 def LD_F32m : FPI<0xD9, MRM0m, (outs), (ins f32mem:$src), "fld{s}\t$src",
472 def LD_F64m : FPI<0xDD, MRM0m, (outs), (ins f64mem:$src), "fld{l}\t$src",
476 def ILD_F16m : FPI<0xDF, MRM0m, (outs), (ins i16mem:$src), "fild{s}\t$src",
478 def ILD_F32m : FPI<0xDB, MRM0m, (outs), (ins i32mem:$src), "fild{l}\t$src",
667 def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
669 def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),
DX86Instr3DNow.td90 def PREFETCH : I3DNow<0x0D, MRM0m, (outs), (ins i8mem:$addr),
DX86InstrSystem.td392 def SGDT16m : I<0x01, MRM0m, (outs), (ins opaque48mem:$dst),
394 def SGDT32m : I<0x01, MRM0m, (outs), (ins opaque48mem:$dst),
396 def SGDT64m : I<0x01, MRM0m, (outs), (ins opaque80mem:$dst),
406 def SLDT16m : I<0x00, MRM0m, (outs), (ins i16mem:$dst),
415 def SLDT64m : RI<0x00, MRM0m, (outs), (ins i16mem:$dst),
DX86InstrArithmetic.td485 def INC8m : I<0xFE, MRM0m, (outs), (ins i8mem :$dst), "inc{b}\t$dst",
488 def INC16m : I<0xFF, MRM0m, (outs), (ins i16mem:$dst), "inc{w}\t$dst",
491 def INC32m : I<0xFF, MRM0m, (outs), (ins i32mem:$dst), "inc{l}\t$dst",
494 def INC64m : RI<0xFF, MRM0m, (outs), (ins i64mem:$dst), "inc{q}\t$dst",
1197 defm ADD : ArithBinOp_RF<0x00, 0x02, 0x04, "add", MRM0r, MRM0m,
1242 def TEST8mi : BinOpMI_F<0xF6, "test", Xi8 , X86testpat, MRM0m>;
1243 def TEST16mi : BinOpMI_F<0xF6, "test", Xi16, X86testpat, MRM0m>;
1244 def TEST32mi : BinOpMI_F<0xF6, "test", Xi32, X86testpat, MRM0m>;
1245 def TEST64mi32 : BinOpMI_F<0xF6, "test", Xi64, X86testpat, MRM0m>;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h299 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
691 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp782 case X86II::MRM0m: case X86II::MRM1m: in EmitVEXOpcodePrefix()
1012 case X86II::MRM0m: case X86II::MRM1m: in DetermineREXPrefix()
1371 case X86II::MRM0m: case X86II::MRM1m: in encodeInstruction()
1381 (Form == X86II::MRMXm) ? 0 : Form - X86II::MRM0m, TSFlags, in encodeInstruction()
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h115 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, enumerator
DX86RecognizableInstr.cpp685 case X86Local::MRM0m: in emitInstructionSpecifier()
809 case X86Local::MRM0m: case X86Local::MRM1m: in emitDecodePath()
813 filter = std::make_unique<ExtendedFilter>(false, Form - X86Local::MRM0m); in emitDecodePath()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp110 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
740 case X86Local::MRM0m: in emitInstructionSpecifier()
858 case X86Local::MRM0m: case X86Local::MRM1m: in emitDecodePath()
862 filter = new ExtendedFilter(false, Form - X86Local::MRM0m); in emitDecodePath()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h626 MRM0m = 40, MRM1m = 41, MRM2m = 42, MRM3m = 43, // Format /0 /1 /2 /3 enumerator
1062 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp965 case X86II::MRM0m: in emitVEXOpcodePrefix()
1226 case X86II::MRM0m: in determineREXPrefix()
1658 case X86II::MRM0m: in encodeInstruction()
1672 (Form == X86II::MRMXm) ? 0 : Form - X86II::MRM0m, TSFlags, in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h677 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, // Format /0 /1 /2 /3 enumerator
1140 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp988 case X86II::MRM0m: in emitVEXOpcodePrefix()
1263 case X86II::MRM0m: in emitREXPrefix()
1683 case X86II::MRM0m: in encodeInstruction()
1697 (Form == X86II::MRMXm) ? 0 : Form - X86II::MRM0m, TSFlags, in encodeInstruction()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
/external/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;

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