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Searched refs:MRM1m (Results 1 – 25 of 46) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td603 def ROR8mCL : I<0xD2, MRM1m, (outs), (ins i8mem :$dst),
606 def ROR16mCL : I<0xD3, MRM1m, (outs), (ins i16mem:$dst),
609 def ROR32mCL : I<0xD3, MRM1m, (outs), (ins i32mem:$dst),
612 def ROR64mCL : RI<0xD3, MRM1m, (outs), (ins i64mem:$dst),
619 def ROR8mi : Ii8<0xC0, MRM1m, (outs), (ins i8mem :$dst, u8imm:$src),
622 def ROR16mi : Ii8<0xC1, MRM1m, (outs), (ins i16mem:$dst, u8imm:$src),
626 def ROR32mi : Ii8<0xC1, MRM1m, (outs), (ins i32mem:$dst, u8imm:$src),
630 def ROR64mi : RIi8<0xC1, MRM1m, (outs), (ins i64mem:$dst, u8imm:$src),
636 def ROR8m1 : I<0xD0, MRM1m, (outs), (ins i8mem :$dst),
639 def ROR16m1 : I<0xD1, MRM1m, (outs), (ins i16mem:$dst),
[all …]
DX86Instr3DNow.td98 def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr",
DX86InstrFPStack.td303 defm MUL : FPBinary<any_fmul, MRM1m, "mul">;
594 def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">;
595 def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst">;
596 def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll}\t$dst">;
765 def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaquemem:$src),
768 def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaquemem:$src),
DX86InstrSystem.td247 def STRm : I<0x00, MRM1m, (outs), (ins i16mem:$dst), "str{w}\t$dst", []>, TB;
366 def SIDT16m : I<0x01, MRM1m, (outs), (ins opaquemem:$dst),
368 def SIDT32m : I<0x01, MRM1m, (outs), (ins opaquemem:$dst),
370 def SIDT64m : I<0x01, MRM1m, (outs), (ins opaquemem:$dst),
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td630 def ROR8mCL : I<0xD2, MRM1m, (outs), (ins i8mem :$dst),
634 def ROR16mCL : I<0xD3, MRM1m, (outs), (ins i16mem:$dst),
638 def ROR32mCL : I<0xD3, MRM1m, (outs), (ins i32mem:$dst),
642 def ROR64mCL : RI<0xD3, MRM1m, (outs), (ins i64mem:$dst),
647 def ROR8mi : Ii8<0xC0, MRM1m, (outs), (ins i8mem :$dst, u8imm:$src),
651 def ROR16mi : Ii8<0xC1, MRM1m, (outs), (ins i16mem:$dst, u8imm:$src),
655 def ROR32mi : Ii8<0xC1, MRM1m, (outs), (ins i32mem:$dst, u8imm:$src),
659 def ROR64mi : RIi8<0xC1, MRM1m, (outs), (ins i64mem:$dst, u8imm:$src),
665 def ROR8m1 : I<0xD0, MRM1m, (outs), (ins i8mem :$dst),
669 def ROR16m1 : I<0xD1, MRM1m, (outs), (ins i16mem:$dst),
[all …]
DX86Instr3DNow.td94 def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr",
DX86InstrFPStack.td249 defm MUL : FPBinary<fmul, MRM1m, "mul">;
529 def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst",
531 def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst",
533 def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst),
672 def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
674 def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),
DX86InstrSystem.td251 def STRm : I<0x00, MRM1m, (outs), (ins i16mem:$dst),
398 def SIDT16m : I<0x01, MRM1m, (outs), (ins opaque48mem:$dst),
400 def SIDT32m : I<0x01, MRM1m, (outs), (ins opaque48mem:$dst),
402 def SIDT64m : I<0x01, MRM1m, (outs), (ins opaque80mem:$dst),
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h299 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator
691 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp782 case X86II::MRM0m: case X86II::MRM1m: in EmitVEXOpcodePrefix()
1012 case X86II::MRM0m: case X86II::MRM1m: in DetermineREXPrefix()
1371 case X86II::MRM0m: case X86II::MRM1m: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrShiftRotate.td603 def ROR8mCL : I<0xD2, MRM1m, (outs), (ins i8mem :$dst),
606 def ROR16mCL : I<0xD3, MRM1m, (outs), (ins i16mem:$dst),
609 def ROR32mCL : I<0xD3, MRM1m, (outs), (ins i32mem:$dst),
612 def ROR64mCL : RI<0xD3, MRM1m, (outs), (ins i64mem:$dst),
619 def ROR8mi : Ii8<0xC0, MRM1m, (outs), (ins i8mem :$dst, u8imm:$src),
622 def ROR16mi : Ii8<0xC1, MRM1m, (outs), (ins i16mem:$dst, u8imm:$src),
626 def ROR32mi : Ii8<0xC1, MRM1m, (outs), (ins i32mem:$dst, u8imm:$src),
630 def ROR64mi : RIi8<0xC1, MRM1m, (outs), (ins i64mem:$dst, u8imm:$src),
636 def ROR8m1 : I<0xD0, MRM1m, (outs), (ins i8mem :$dst),
639 def ROR16m1 : I<0xD1, MRM1m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrKL.td75 def AESDECWIDE128KL : I<0xD8, MRM1m, (outs), (ins opaquemem:$src),
DX86Instr3DNow.td98 def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr",
DX86InstrFPStack.td297 defm MUL : FPBinary<any_fmul, MRM1m, "mul">;
596 def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">;
597 def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst">;
598 def ISTT_FP64m : FPI<0xDD, MRM1m, (outs), (ins i64mem:$dst), "fisttp{ll}\t$dst">;
761 def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaquemem:$src),
764 def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaquemem:$src),
DX86InstrSystem.td257 def STRm : I<0x00, MRM1m, (outs), (ins i16mem:$dst), "str{w}\t$dst", []>, TB;
376 def SIDT16m : I<0x01, MRM1m, (outs), (ins opaquemem:$dst),
378 def SIDT32m : I<0x01, MRM1m, (outs), (ins opaquemem:$dst),
380 def SIDT64m : I<0x01, MRM1m, (outs), (ins opaquemem:$dst),
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h115 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, enumerator
DX86RecognizableInstr.cpp686 case X86Local::MRM1m: in emitInstructionSpecifier()
809 case X86Local::MRM0m: case X86Local::MRM1m: in emitDecodePath()
DX86FoldTablesEmitter.cpp430 (MemFormNum == X86Local::MRM1m && RegFormNum == X86Local::MRM1r) || in areOppositeForms()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h626 MRM0m = 40, MRM1m = 41, MRM2m = 42, MRM3m = 43, // Format /0 /1 /2 /3 enumerator
1062 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp966 case X86II::MRM1m: in emitVEXOpcodePrefix()
1227 case X86II::MRM1m: in determineREXPrefix()
1659 case X86II::MRM1m: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h677 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, // Format /0 /1 /2 /3 enumerator
1140 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp989 case X86II::MRM1m: in emitVEXOpcodePrefix()
1264 case X86II::MRM1m: in emitREXPrefix()
1684 case X86II::MRM1m: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp110 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator
741 case X86Local::MRM1m: in emitInstructionSpecifier()
858 case X86Local::MRM0m: case X86Local::MRM1m: in emitDecodePath()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
/external/llvm/test/TableGen/
DTargetInstrInfo.td55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;

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