Home
last modified time | relevance | path

Searched refs:MRM1r (Results 1 – 25 of 36) sorted by relevance

12

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td557 def ROR8rCL : I<0xD2, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
560 def ROR16rCL : I<0xD3, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
563 def ROR32rCL : I<0xD3, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
566 def ROR64rCL : RI<0xD3, MRM1r, (outs GR64:$dst), (ins GR64:$src1),
571 def ROR8ri : Ii8<0xC0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, u8imm:$src2),
574 def ROR16ri : Ii8<0xC1, MRM1r, (outs GR16:$dst), (ins GR16:$src1, u8imm:$src2),
578 def ROR32ri : Ii8<0xC1, MRM1r, (outs GR32:$dst), (ins GR32:$src1, u8imm:$src2),
582 def ROR64ri : RIi8<0xC1, MRM1r, (outs GR64:$dst),
588 def ROR8r1 : I<0xD0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
591 def ROR16r1 : I<0xD1, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
[all …]
DX86InstrSystem.td240 def STR16r : I<0x00, MRM1r, (outs GR16:$dst), (ins),
242 def STR32r : I<0x00, MRM1r, (outs GR32:$dst), (ins),
244 def STR64r : RI<0x00, MRM1r, (outs GR64:$dst), (ins),
463 def RDSSPD : I<0x1E, MRM1r, (outs GR32:$dst), (ins GR32:$src),
466 def RDSSPQ : RI<0x1E, MRM1r, (outs GR64:$dst), (ins GR64:$src),
608 def RDGSBASE : I<0xAE, MRM1r, (outs GR32:$dst), (ins),
611 def RDGSBASE64 : RI<0xAE, MRM1r, (outs GR64:$dst), (ins),
DX86InstrFPStack.td338 def MUL_FST0r : FPST0rInst <MRM1r, "fmul\t{$op, %st|st, $op}">;
339 def MUL_FrST0 : FPrST0Inst <MRM1r, "fmul\t{%st, $op|$op, st}">;
340 def MUL_FPrST0 : FPrST0PInst<MRM1r, "fmulp\t{%st, $op|$op, st}">;
457 def CMOVE_F : FPI<0xDA, MRM1r, (outs), (ins RSTi:$op),
465 def CMOVNE_F : FPI<0xDB, MRM1r, (outs), (ins RSTi:$op),
604 def XCH_F : FPI<0xD9, MRM1r, (outs), (ins RSTi:$op), "fxch\t$op">;
DX86InstrArithmetic.td489 def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
492 def DEC16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
496 def DEC32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
500 def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src1), "dec{q}\t$dst",
1174 defm OR : ArithBinOp_RF<0x08, 0x0A, 0x0C, "or", MRM1r, MRM1m,
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td578 def ROR8rCL : I<0xD2, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
581 def ROR16rCL : I<0xD3, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
584 def ROR32rCL : I<0xD3, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
587 def ROR64rCL : RI<0xD3, MRM1r, (outs GR64:$dst), (ins GR64:$src1),
592 def ROR8ri : Ii8<0xC0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, u8imm:$src2),
595 def ROR16ri : Ii8<0xC1, MRM1r, (outs GR16:$dst), (ins GR16:$src1, u8imm:$src2),
599 def ROR32ri : Ii8<0xC1, MRM1r, (outs GR32:$dst), (ins GR32:$src1, u8imm:$src2),
603 def ROR64ri : RIi8<0xC1, MRM1r, (outs GR64:$dst),
610 def ROR8r1 : I<0xD0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
614 def ROR16r1 : I<0xD1, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
[all …]
DX86InstrSystem.td245 def STR16r : I<0x00, MRM1r, (outs GR16:$dst), (ins),
247 def STR32r : I<0x00, MRM1r, (outs GR32:$dst), (ins),
249 def STR64r : RI<0x00, MRM1r, (outs GR64:$dst), (ins),
579 def RDGSBASE : I<0xAE, MRM1r, (outs GR32:$dst), (ins),
582 def RDGSBASE64 : RI<0xAE, MRM1r, (outs GR64:$dst), (ins),
DX86InstrFPStack.td279 def MUL_FST0r : FPST0rInst <MRM1r, "fmul\t$op">;
280 def MUL_FrST0 : FPrST0Inst <MRM1r, "fmul\t{%st(0), $op|$op, st(0)}">;
281 def MUL_FPrST0 : FPrST0PInst<MRM1r, "fmulp\t$op">;
387 def CMOVE_F : FPI<0xDA, MRM1r, (outs), (ins RST:$op),
395 def CMOVNE_F : FPI<0xDB, MRM1r, (outs), (ins RST:$op),
542 def XCH_F : FPI<0xD9, MRM1r, (outs), (ins RST:$op), "fxch\t$op", IIC_FXCH>;
DX86InstrArithmetic.td501 def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
506 def DEC16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
510 def DEC32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
514 def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src1), "dec{q}\t$dst",
1193 defm OR : ArithBinOp_RF<0x08, 0x0A, 0x0C, "or", MRM1r, MRM1m,
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h295 MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, // Format /0 /1 /2 /3 enumerator
685 case X86II::MRM0r: case X86II::MRM1r: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp869 case X86II::MRM0r: case X86II::MRM1r: in EmitVEXOpcodePrefix()
1020 case X86II::MRM0r: case X86II::MRM1r: in DetermineREXPrefix()
1355 case X86II::MRM0r: case X86II::MRM1r: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrShiftRotate.td557 def ROR8rCL : I<0xD2, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
560 def ROR16rCL : I<0xD3, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
563 def ROR32rCL : I<0xD3, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
566 def ROR64rCL : RI<0xD3, MRM1r, (outs GR64:$dst), (ins GR64:$src1),
571 def ROR8ri : Ii8<0xC0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1, u8imm:$src2),
574 def ROR16ri : Ii8<0xC1, MRM1r, (outs GR16:$dst), (ins GR16:$src1, u8imm:$src2),
578 def ROR32ri : Ii8<0xC1, MRM1r, (outs GR32:$dst), (ins GR32:$src1, u8imm:$src2),
582 def ROR64ri : RIi8<0xC1, MRM1r, (outs GR64:$dst),
588 def ROR8r1 : I<0xD0, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
591 def ROR16r1 : I<0xD1, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
[all …]
DX86InstrSystem.td250 def STR16r : I<0x00, MRM1r, (outs GR16:$dst), (ins),
252 def STR32r : I<0x00, MRM1r, (outs GR32:$dst), (ins),
254 def STR64r : RI<0x00, MRM1r, (outs GR64:$dst), (ins),
473 def RDSSPD : I<0x1E, MRM1r, (outs GR32:$dst), (ins GR32:$src),
476 def RDSSPQ : RI<0x1E, MRM1r, (outs GR64:$dst), (ins GR64:$src),
618 def RDGSBASE : I<0xAE, MRM1r, (outs GR32:$dst), (ins),
621 def RDGSBASE64 : RI<0xAE, MRM1r, (outs GR64:$dst), (ins),
DX86InstrFPStack.td332 def MUL_FST0r : FPST0rInst <MRM1r, "fmul\t{$op, %st|st, $op}">;
333 def MUL_FrST0 : FPrST0Inst <MRM1r, "fmul\t{%st, $op|$op, st}">;
334 def MUL_FPrST0 : FPrST0PInst<MRM1r, "fmulp\t{%st, $op|$op, st}">;
453 def CMOVE_F : FPI<0xDA, MRM1r, (outs), (ins RSTi:$op),
461 def CMOVNE_F : FPI<0xDB, MRM1r, (outs), (ins RSTi:$op),
607 def XCH_F : FPI<0xD9, MRM1r, (outs), (ins RSTi:$op), "fxch\t$op">;
DX86InstrArithmetic.td489 def DEC8r : I<0xFE, MRM1r, (outs GR8 :$dst), (ins GR8 :$src1),
492 def DEC16r : I<0xFF, MRM1r, (outs GR16:$dst), (ins GR16:$src1),
496 def DEC32r : I<0xFF, MRM1r, (outs GR32:$dst), (ins GR32:$src1),
500 def DEC64r : RI<0xFF, MRM1r, (outs GR64:$dst), (ins GR64:$src1), "dec{q}\t$dst",
1174 defm OR : ArithBinOp_RF<0x08, 0x0A, 0x0C, "or", MRM1r, MRM1m,
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h123 MRM0r = 48, MRM1r = 49, MRM2r = 50, MRM3r = 51, enumerator
DX86RecognizableInstr.cpp655 case X86Local::MRM1r: in emitInstructionSpecifier()
794 case X86Local::MRM0r: case X86Local::MRM1r: in emitDecodePath()
DX86FoldTablesEmitter.cpp430 (MemFormNum == X86Local::MRM1m && RegFormNum == X86Local::MRM1r) || in areOppositeForms()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h666 MRM0r = 56, MRM1r = 57, MRM2r = 58, MRM3r = 59, // Format /0 /1 /2 /3 enumerator
1055 case X86II::MRM0r: case X86II::MRM1r: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp1085 case X86II::MRM1r: in emitVEXOpcodePrefix()
1240 case X86II::MRM1r: in determineREXPrefix()
1629 case X86II::MRM1r: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h717 MRM0r = 48, MRM1r = 49, MRM2r = 50, MRM3r = 51, // Format /0 /1 /2 /3 enumerator
1128 case X86II::MRM0r: case X86II::MRM1r: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp1117 case X86II::MRM1r: in emitVEXOpcodePrefix()
1277 case X86II::MRM1r: in emitREXPrefix()
1650 case X86II::MRM1r: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp108 MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, enumerator
716 case X86Local::MRM1r: in emitInstructionSpecifier()
852 case X86Local::MRM0r: case X86Local::MRM1r: in emitDecodePath()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td52 def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>;
/external/llvm/test/TableGen/
DTargetInstrInfo.td52 def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>;
/external/llvm-project/llvm/tools/llvm-exegesis/lib/X86/
DTarget.cpp75 case X86II::MRM1r: in isInvalidMemoryInstr()

12