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Searched refs:MRM7m (Results 1 – 25 of 42) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td272 def SAR8mCL : I<0xD2, MRM7m, (outs), (ins i8mem :$dst),
275 def SAR16mCL : I<0xD3, MRM7m, (outs), (ins i16mem:$dst),
279 def SAR32mCL : I<0xD3, MRM7m, (outs), (ins i32mem:$dst),
283 def SAR64mCL : RI<0xD3, MRM7m, (outs), (ins i64mem:$dst),
290 def SAR8mi : Ii8<0xC0, MRM7m, (outs), (ins i8mem :$dst, u8imm:$src),
293 def SAR16mi : Ii8<0xC1, MRM7m, (outs), (ins i16mem:$dst, u8imm:$src),
297 def SAR32mi : Ii8<0xC1, MRM7m, (outs), (ins i32mem:$dst, u8imm:$src),
301 def SAR64mi : RIi8<0xC1, MRM7m, (outs), (ins i64mem:$dst, u8imm:$src),
307 def SAR8m1 : I<0xD0, MRM7m, (outs), (ins i8mem :$dst),
310 def SAR16m1 : I<0xD1, MRM7m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrVMX.td49 def VMPTRSTm : I<0xC7, MRM7m, (outs), (ins i64mem:$vmcs),
DX86InstrFPStack.td308 defm DIVR: FPBinary<any_fdiv, MRM7m, "divr", 0>;
410 def FNSTSWm : FPI<0xDD, MRM7m, (outs), (ins i16mem:$dst), "fnstsw\t$dst">;
563 def ST_FP80m : FPI<0xDB, MRM7m, (outs), (ins f80mem:$dst), "fstp{t}\t$dst">;
568 def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">;
706 def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world
DX86InstrArithmetic.td331 def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
334 def IDIV16m: I<0xF7, MRM7m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX
337 def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src),
340 def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src),
1192 defm CMP : ArithBinOp_F<0x38, 0x3A, 0x3C, "cmp", MRM7r, MRM7m, X86cmp, 0, 0>;
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td284 def SAR8mCL : I<0xD2, MRM7m, (outs), (ins i8mem :$dst),
288 def SAR16mCL : I<0xD3, MRM7m, (outs), (ins i16mem:$dst),
292 def SAR32mCL : I<0xD3, MRM7m, (outs), (ins i32mem:$dst),
296 def SAR64mCL : RI<0xD3, MRM7m, (outs), (ins i64mem:$dst),
301 def SAR8mi : Ii8<0xC0, MRM7m, (outs), (ins i8mem :$dst, u8imm:$src),
305 def SAR16mi : Ii8<0xC1, MRM7m, (outs), (ins i16mem:$dst, u8imm:$src),
309 def SAR32mi : Ii8<0xC1, MRM7m, (outs), (ins i32mem:$dst, u8imm:$src),
313 def SAR64mi : RIi8<0xC1, MRM7m, (outs), (ins i64mem:$dst, u8imm:$src),
319 def SAR8m1 : I<0xD0, MRM7m, (outs), (ins i8mem :$dst),
323 def SAR16m1 : I<0xD1, MRM7m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrVMX.td44 def VMPTRSTm : I<0xC7, MRM7m, (outs), (ins i64mem:$vmcs),
DX86InstrFPStack.td253 defm DIVR: FPBinary<fdiv, MRM7m, "divr", 0>;
339 def FNSTSWm : FPI<0xDD, MRM7m, (outs), (ins i16mem:$dst), "fnstsw\t$dst">;
492 def ST_FP80m : FPI<0xDB, MRM7m, (outs), (ins f80mem:$dst), "fstp{t}\t$dst",
502 def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst",
619 def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world
DX86InstrArithmetic.td351 def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
355 def IDIV16m: I<0xF7, MRM7m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX
359 def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src),
363 def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src),
1211 defm CMP : ArithBinOp_F<0x38, 0x3A, 0x3C, "cmp", MRM7r, MRM7m, X86cmp, 0, 0>;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h300 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7 enumerator
694 case X86II::MRM6m: case X86II::MRM7m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp785 case X86II::MRM6m: case X86II::MRM7m: { in EmitVEXOpcodePrefix()
1015 case X86II::MRM6m: case X86II::MRM7m: in DetermineREXPrefix()
1374 case X86II::MRM6m: case X86II::MRM7m: { in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrShiftRotate.td272 def SAR8mCL : I<0xD2, MRM7m, (outs), (ins i8mem :$dst),
275 def SAR16mCL : I<0xD3, MRM7m, (outs), (ins i16mem:$dst),
279 def SAR32mCL : I<0xD3, MRM7m, (outs), (ins i32mem:$dst),
283 def SAR64mCL : RI<0xD3, MRM7m, (outs), (ins i64mem:$dst),
290 def SAR8mi : Ii8<0xC0, MRM7m, (outs), (ins i8mem :$dst, u8imm:$src),
293 def SAR16mi : Ii8<0xC1, MRM7m, (outs), (ins i16mem:$dst, u8imm:$src),
297 def SAR32mi : Ii8<0xC1, MRM7m, (outs), (ins i32mem:$dst, u8imm:$src),
301 def SAR64mi : RIi8<0xC1, MRM7m, (outs), (ins i64mem:$dst, u8imm:$src),
307 def SAR8m1 : I<0xD0, MRM7m, (outs), (ins i8mem :$dst),
310 def SAR16m1 : I<0xD1, MRM7m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrVMX.td49 def VMPTRSTm : I<0xC7, MRM7m, (outs), (ins i64mem:$vmcs),
DX86InstrFPStack.td302 defm DIVR: FPBinary<any_fdiv, MRM7m, "divr", 0>;
405 def FNSTSWm : FPI<0xDD, MRM7m, (outs), (ins i16mem:$dst), "fnstsw\t$dst">;
565 def ST_FP80m : FPI<0xDB, MRM7m, (outs), (ins f80mem:$dst), "fstp{t}\t$dst">;
570 def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">;
702 def FNSTCW16m : I<0xD9, MRM7m, // [mem16] = X87 control world
DX86InstrArithmetic.td331 def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
334 def IDIV16m: I<0xF7, MRM7m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX
337 def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src),
340 def IDIV64m: RI<0xF7, MRM7m, (outs), (ins i64mem:$src),
1201 defm CMP : ArithBinOp_F<0x38, 0x3A, 0x3C, "cmp", MRM7r, MRM7m, X86cmp, 0, 0>;
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h116 MRM4m = 36, MRM5m = 37, MRM6m = 38, MRM7m = 39, enumerator
DX86FoldTablesEmitter.cpp277 return FormBitsNum >= X86Local::MRMDestMem && FormBitsNum <= X86Local::MRM7m; in hasMemoryFormat()
436 (MemFormNum == X86Local::MRM7m && RegFormNum == X86Local::MRM7r) || in areOppositeForms()
DX86RecognizableInstr.cpp692 case X86Local::MRM7m: in emitInstructionSpecifier()
812 case X86Local::MRM6m: case X86Local::MRM7m: in emitDecodePath()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h627 MRM4m = 44, MRM5m = 45, MRM6m = 46, MRM7m = 47, // Format /4 /5 /6 /7 enumerator
1065 case X86II::MRM6m: case X86II::MRM7m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp972 case X86II::MRM7m: { in emitVEXOpcodePrefix()
1233 case X86II::MRM7m: in determineREXPrefix()
1665 case X86II::MRM7m: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h678 MRM4m = 36, MRM5m = 37, MRM6m = 38, MRM7m = 39, // Format /4 /5 /6 /7 enumerator
1143 case X86II::MRM6m: case X86II::MRM7m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp995 case X86II::MRM7m: { in emitVEXOpcodePrefix()
1270 case X86II::MRM7m: in emitREXPrefix()
1690 case X86II::MRM7m: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp111 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, enumerator
747 case X86Local::MRM7m: in emitInstructionSpecifier()
861 case X86Local::MRM6m: case X86Local::MRM7m: in emitDecodePath()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td57 def MRM6m : Format<30>; def MRM7m : Format<31>;
/external/llvm/test/TableGen/
DTargetInstrInfo.td57 def MRM6m : Format<30>; def MRM7m : Format<31>;
/external/llvm-project/llvm/tools/llvm-exegesis/lib/X86/
DTarget.cpp178 case X86II::MRM7m: in isInvalidMemoryInstr()

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